https://gcc.gnu.org/g:37266521a8e508c53b116f76a16fb0def13460f7
commit 37266521a8e508c53b116f76a16fb0def13460f7 Author: Michael Meissner <[email protected]> Date: Thu Oct 1 01:45:08 2026 -0400 Add back missing files. 2026-10-01 Michael Meissner <[email protected]> * config/rs6000/ppc-fixbfbitint.c: Add file back. * config/rs6000/ppc-fixhfbitint.c: Likewise. * config/rs6000/ppc-floatbitintbf.c: Likewise. * config/rs6000/ppc-floatbitinthf.c: Likewise. Diff: --- libgcc/config/rs6000/ppc-fixbfbitint.c | 128 +++++++++++++++++++++++++++++++ libgcc/config/rs6000/ppc-fixhfbitint.c | 127 ++++++++++++++++++++++++++++++ libgcc/config/rs6000/ppc-floatbitintbf.c | 102 ++++++++++++++++++++++++ libgcc/config/rs6000/ppc-floatbitinthf.c | 102 ++++++++++++++++++++++++ 4 files changed, 459 insertions(+) diff --git a/libgcc/config/rs6000/ppc-fixbfbitint.c b/libgcc/config/rs6000/ppc-fixbfbitint.c new file mode 100644 index 000000000000..3271912dc260 --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixbfbitint.c @@ -0,0 +1,128 @@ +/* Software floating-point emulation. + Convert IEEE single to signed or unsigned _BitInt. + + Copyright (C) 2023 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. + +This is a clone of softfp/fixsfbit.c + +We provide 2 conversions, one that passes the BFtype in a floating point +register and the other returns it in a general purpose register that is used +when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" +#include "bitint.h" + +#ifdef __BITINT_MAXWIDTH__ +/* Silence declaration without prototype warning. */ +extern void __fixbfbitint (UBILtype *, SItype, BFtype); +extern void __fixbfbitint_gpr (UBILtype *, SItype, unsigned short); + +/* BFtype is passed in FPR registers. */ +void +__fixbfbitint (UBILtype *r, SItype rprec, BFtype a) +{ + FP_DECL_EX; + FP_DECL_B (A); + USItype arprec = rprec < 0 ? -rprec : rprec; + USItype rn = ((USItype) arprec + BIL_TYPE_SIZE - 1) / BIL_TYPE_SIZE; + USItype rv; + USItype rsize = arprec > SI_BITS ? SI_BITS : arprec; + USItype rsigned = rprec < 0; + USItype ovf = 0; + USItype shift = 0; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + if (arprec > SI_BITS) + { + if (A_e < _FP_EXPBIAS_B || (A_s && !rsigned)) + ovf = 1; + else if (A_e >= (_FP_EXPMAX_B < _FP_EXPBIAS_B + arprec + ? _FP_EXPMAX_B + : _FP_EXPBIAS_B + arprec - rsigned)) + { + ovf = 1; + if (A_s + && A_e == _FP_EXPBIAS_B + arprec - 1 + && A_e < _FP_EXPMAX_B) + A_e -= arprec - SI_BITS; + } + else if (A_e >= _FP_EXPBIAS_B + SI_BITS - rsigned) + { + shift = A_e - (_FP_EXPBIAS_B + SI_BITS - rsigned - 1); + A_e -= shift; + } + } + FP_TO_INT_B (rv, A, rsize, rsigned); + FP_HANDLE_EXCEPTIONS; + FP_TO_BITINT (r, rn, arprec, shift, rv, rsize, rsigned, ovf, SI); +} + +/* BFtype is passed in GPR registers. */ +void +__fixbfbitint_gpr (UBILtype *r, SItype rprec, unsigned short us) +{ + FP_DECL_EX; + FP_DECL_B (A); + USItype arprec = rprec < 0 ? -rprec : rprec; + USItype rn = ((USItype) arprec + BIL_TYPE_SIZE - 1) / BIL_TYPE_SIZE; + USItype rv; + USItype rsize = arprec > SI_BITS ? SI_BITS : arprec; + USItype rsigned = rprec < 0; + USItype ovf = 0; + USItype shift = 0; + BFtype a; + union ushort_bf u; + + u.us = us; + a = u.bf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_B (A, a); + if (arprec > SI_BITS) + { + if (A_e < _FP_EXPBIAS_B || (A_s && !rsigned)) + ovf = 1; + else if (A_e >= (_FP_EXPMAX_B < _FP_EXPBIAS_B + arprec + ? _FP_EXPMAX_B + : _FP_EXPBIAS_B + arprec - rsigned)) + { + ovf = 1; + if (A_s + && A_e == _FP_EXPBIAS_B + arprec - 1 + && A_e < _FP_EXPMAX_B) + A_e -= arprec - SI_BITS; + } + else if (A_e >= _FP_EXPBIAS_B + SI_BITS - rsigned) + { + shift = A_e - (_FP_EXPBIAS_B + SI_BITS - rsigned - 1); + A_e -= shift; + } + } + FP_TO_INT_B (rv, A, rsize, rsigned); + FP_HANDLE_EXCEPTIONS; + FP_TO_BITINT (r, rn, arprec, shift, rv, rsize, rsigned, ovf, SI); +} +#endif diff --git a/libgcc/config/rs6000/ppc-fixhfbitint.c b/libgcc/config/rs6000/ppc-fixhfbitint.c new file mode 100644 index 000000000000..bb1818ec0695 --- /dev/null +++ b/libgcc/config/rs6000/ppc-fixhfbitint.c @@ -0,0 +1,127 @@ +/* Software floating-point emulation. + Convert IEEE single to signed or unsigned _BitInt. + + Copyright (C) 2023 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. + +This is a clone of softfp/fixsfbit.c + +We provide 2 conversions, one that passes the HFtype in a floating point +register and the other returns it in a general purpose register that is used +when HFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" +#include "bitint.h" + +#ifdef __BITINT_MAXWIDTH__ +extern void __fixhfbitint (UBILtype *, SItype, HFtype); +extern void __fixhfbitint_gpr (UBILtype *, SItype, unsigned short); + +/* HFtype is passed in FPR registers. */ +void +__fixhfbitint (UBILtype *r, SItype rprec, HFtype a) +{ + FP_DECL_EX; + FP_DECL_H (A); + USItype arprec = rprec < 0 ? -rprec : rprec; + USItype rn = ((USItype) arprec + BIL_TYPE_SIZE - 1) / BIL_TYPE_SIZE; + USItype rv; + USItype rsize = arprec > SI_BITS ? SI_BITS : arprec; + USItype rsigned = rprec < 0; + USItype ovf = 0; + USItype shift = 0; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + if (arprec > SI_BITS) + { + if (A_e < _FP_EXPBIAS_H || (A_s && !rsigned)) + ovf = 1; + else if (A_e >= (_FP_EXPMAX_H < _FP_EXPBIAS_H + arprec + ? _FP_EXPMAX_H + : _FP_EXPBIAS_H + arprec - rsigned)) + { + ovf = 1; + if (A_s + && A_e == _FP_EXPBIAS_H + arprec - 1 + && A_e < _FP_EXPMAX_H) + A_e -= arprec - SI_BITS; + } + else if (A_e >= _FP_EXPBIAS_H + SI_BITS - rsigned) + { + shift = A_e - (_FP_EXPBIAS_H + SI_BITS - rsigned - 1); + A_e -= shift; + } + } + FP_TO_INT_H (rv, A, rsize, rsigned); + FP_HANDLE_EXCEPTIONS; + FP_TO_BITINT (r, rn, arprec, shift, rv, rsize, rsigned, ovf, SI); +} + +/* HFtype is passed in GPR registers. */ +void +__fixhfbitint_gpr (UBILtype *r, SItype rprec, unsigned short us) +{ + FP_DECL_EX; + FP_DECL_H (A); + USItype arprec = rprec < 0 ? -rprec : rprec; + USItype rn = ((USItype) arprec + BIL_TYPE_SIZE - 1) / BIL_TYPE_SIZE; + USItype rv; + USItype rsize = arprec > SI_BITS ? SI_BITS : arprec; + USItype rsigned = rprec < 0; + USItype ovf = 0; + USItype shift = 0; + HFtype a; + union ushort_hf u; + + u.us = us; + a = u.hf; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + if (arprec > SI_BITS) + { + if (A_e < _FP_EXPBIAS_H || (A_s && !rsigned)) + ovf = 1; + else if (A_e >= (_FP_EXPMAX_H < _FP_EXPBIAS_H + arprec + ? _FP_EXPMAX_H + : _FP_EXPBIAS_H + arprec - rsigned)) + { + ovf = 1; + if (A_s + && A_e == _FP_EXPBIAS_H + arprec - 1 + && A_e < _FP_EXPMAX_H) + A_e -= arprec - SI_BITS; + } + else if (A_e >= _FP_EXPBIAS_H + SI_BITS - rsigned) + { + shift = A_e - (_FP_EXPBIAS_H + SI_BITS - rsigned - 1); + A_e -= shift; + } + } + FP_TO_INT_H (rv, A, rsize, rsigned); + FP_HANDLE_EXCEPTIONS; + FP_TO_BITINT (r, rn, arprec, shift, rv, rsize, rsigned, ovf, SI); +} +#endif diff --git a/libgcc/config/rs6000/ppc-floatbitintbf.c b/libgcc/config/rs6000/ppc-floatbitintbf.c new file mode 100644 index 000000000000..bc3be1ed8886 --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatbitintbf.c @@ -0,0 +1,102 @@ +/* Software floating-point emulation. + Convert a _BitInt to bfloat16. + + Copyright (C) 2023 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. + +This is a clone of softfp/floatbitintbf.c. + +We provide 2 conversions, one that returns the BFtype in a floating point +register and the other returns it in a general purpose register that is used +when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "brain.h" +#include "bitint.h" + +#ifdef __BITINT_MAXWIDTH__ + +/* Silence declaration without prototype warning. */ +extern BFtype __floatbitintbf (const UBILtype *, SItype); +extern unsigned short __floatbitintbf_gpr (const UBILtype *, SItype); + +/* BFtype returned in FPRs. */ +BFtype +__floatbitintbf (const UBILtype *i, SItype iprec) +{ + SItype iv; + USItype shift = 0; + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + + FP_FROM_BITINT (i, iprec, iv, shift, SI); + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, iv, SI_BITS, USItype); + if (shift) + { + A_e += shift; + if (A_e >= _FP_EXPMAX_B) + { + /* Exponent too big; overflow to infinity. */ + _FP_OVERFLOW_SEMIRAW (B, 1, A); + _FP_PACK_SEMIRAW (B, 1, A); + } + } + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +/* BFtype returned in GPRs. */ +unsigned short +__floatbitintbf_gpr (const UBILtype *i, SItype iprec) +{ + SItype iv; + USItype shift = 0; + FP_DECL_EX; + FP_DECL_B (A); + BFtype a; + union ushort_bf u; + + FP_FROM_BITINT (i, iprec, iv, shift, SI); + FP_INIT_ROUNDMODE; + FP_FROM_INT_B (A, iv, SI_BITS, USItype); + if (shift) + { + A_e += shift; + if (A_e >= _FP_EXPMAX_B) + { + /* Exponent too big; overflow to infinity. */ + _FP_OVERFLOW_SEMIRAW (B, 1, A); + _FP_PACK_SEMIRAW (B, 1, A); + } + } + FP_PACK_RAW_B (a, A); + FP_HANDLE_EXCEPTIONS; + + u.bf = a; + return u.us; +} +#endif diff --git a/libgcc/config/rs6000/ppc-floatbitinthf.c b/libgcc/config/rs6000/ppc-floatbitinthf.c new file mode 100644 index 000000000000..f92376994fb6 --- /dev/null +++ b/libgcc/config/rs6000/ppc-floatbitinthf.c @@ -0,0 +1,102 @@ +/* Software floating-point emulation. + Convert a _BitInt to IEEE half. + + Copyright (C) 2023 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. + +This is a clone of softfp/floatbitinthf.c. + +We provide 2 conversions, one that returns the BFtype in a floating point +register and the other returns it in a general purpose register that is used +when BFtype must be converted to the 32/64-bit scalar type. */ + +#include "soft-fp.h" +#include "half.h" +#include "bitint.h" + +#ifdef __BITINT_MAXWIDTH__ + +/* Silence declaration without prototype warning. */ +extern HFtype __floatbitinthf (const UBILtype *, SItype); +extern unsigned short __floatbitinthf_gpr (const UBILtype *, SItype); + +/* HFtype returned in FPRs. */ +HFtype +__floatbitinthf (const UBILtype *i, SItype iprec) +{ + SItype iv; + USItype shift = 0; + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + + FP_FROM_BITINT (i, iprec, iv, shift, SI); + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, iv, SI_BITS, USItype); + if (shift) + { + A_e += shift; + if (A_e >= _FP_EXPMAX_H) + { + /* Exponent too big; overflow to infinity. */ + _FP_OVERFLOW_SEMIRAW (H, 1, A); + _FP_PACK_SEMIRAW (H, 1, A); + } + } + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} + +/* HFtype returned in FPRs. */ +unsigned short +__floatbitinthf_gpr (const UBILtype *i, SItype iprec) +{ + SItype iv; + USItype shift = 0; + FP_DECL_EX; + FP_DECL_H (A); + HFtype a; + union ushort_hf u; + + FP_FROM_BITINT (i, iprec, iv, shift, SI); + FP_INIT_ROUNDMODE; + FP_FROM_INT_H (A, iv, SI_BITS, USItype); + if (shift) + { + A_e += shift; + if (A_e >= _FP_EXPMAX_H) + { + /* Exponent too big; overflow to infinity. */ + _FP_OVERFLOW_SEMIRAW (H, 1, A); + _FP_PACK_SEMIRAW (H, 1, A); + } + } + FP_PACK_RAW_H (a, A); + FP_HANDLE_EXCEPTIONS; + + u.hf = a; + return u.us; +} +#endif
