https://gcc.gnu.org/g:f5f265263dc9faf5cecbe67f15eb7f5c4f85f7d4
commit r17-4919-gf5f265263dc9faf5cecbe67f15eb7f5c4f85f7d4 Author: Jakub Jelinek <[email protected]> Date: Tue Oct 6 08:53:05 2026 +0200 i386: Extend _Float16 to double using F16C/AVX512VL extension to float and then ss2sd [PR127720] For AVX512FP16 we have an instruction for direct extension from _Float16 to _Float64. Without that ISA, we've been emitting a libgcc API call, but for F16C or AVX512VL we can do better, we can emit vcvtph2ps followed by vcvtss2sd, _Float32 is a superset of all _Float16 values and _Float64 is superset of all _Float32 values, so the only changes/exceptions we want are for sNaN input and vcvtph2ps should handle that already. 2026-10-06 Jakub Jelinek <[email protected]> PR target/127720 * config/i386/i386.md (extendhfdf2): Enable also for TARGET_F16C || TARGET_AVX512VL, in those cases expand as extendhfsf2 followed by extendsfdf2. * gcc.target/i386/pr127720-f16c.c: New test. * gcc.target/i386/pr127720-avx512vl.c: New test. Reviewed-by: Uros Bizjak <[email protected]> Diff: --- gcc/config/i386/i386.md | 11 ++++++++++- gcc/testsuite/gcc.target/i386/pr127720-avx512vl.c | 11 +++++++++++ gcc/testsuite/gcc.target/i386/pr127720-f16c.c | 11 +++++++++++ 3 files changed, 32 insertions(+), 1 deletion(-) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 2106e6b56acf..d5b90291fc9c 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -5577,7 +5577,16 @@ [(set (match_operand:DF 0 "register_operand") (float_extend:DF (match_operand:HF 1 "nonimmediate_operand")))] - "TARGET_AVX512FP16") + "TARGET_AVX512FP16 || TARGET_F16C || TARGET_AVX512VL" +{ + if (!TARGET_AVX512FP16) + { + rtx tmp = gen_reg_rtx (SFmode); + emit_insn (gen_extendhfsf2 (tmp, operands[1])); + emit_insn (gen_extendsfdf2 (operands[0], tmp)); + DONE; + } +}) (define_insn "*extendhf<mode>2" [(set (match_operand:MODEF 0 "register_operand" "=v") diff --git a/gcc/testsuite/gcc.target/i386/pr127720-avx512vl.c b/gcc/testsuite/gcc.target/i386/pr127720-avx512vl.c new file mode 100644 index 000000000000..53b6dfccdee7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr127720-avx512vl.c @@ -0,0 +1,11 @@ +/* PR target/127720 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-f16c -mavx512vl -mno-avx512fp16 -mfpmath=sse" } */ +/* { dg-final { scan-assembler "\tvcvtph2ps\t" } } */ +/* { dg-final { scan-assembler "\tvcvtss2sd\t" } } */ + +double +foo (_Float16 x) +{ + return x; +} diff --git a/gcc/testsuite/gcc.target/i386/pr127720-f16c.c b/gcc/testsuite/gcc.target/i386/pr127720-f16c.c new file mode 100644 index 000000000000..0741858f6156 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr127720-f16c.c @@ -0,0 +1,11 @@ +/* PR target/127720 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx512f -mf16c -mfpmath=sse" } */ +/* { dg-final { scan-assembler "\tvcvtph2ps\t" } } */ +/* { dg-final { scan-assembler "\tvcvtss2sd\t" } } */ + +double +foo (_Float16 x) +{ + return x; +}
