https://gcc.gnu.org/g:dacd72c18fe6470601f59c70415df111871fbbd7
commit r17-5359-gdacd72c18fe6470601f59c70415df111871fbbd7 Author: Uros Bizjak <[email protected]> Date: Mon Oct 19 14:31:59 2026 +0200 i386: Fix extendhfdf2 expander with -mgeneral-regs-only [PR127957] Without TARGET_AVX512FP16, the extendhfdf2 expander converts HF to DF in two steps: extendhfsf2 followed by extendsfdf2. The expander's condition only checked for the availability of the first step (F16C or AVX512VL), but not for the second. With -mgeneral-regs-only on ia32 there is neither x87 nor SSE math, so extendsfdf2 is not available and expansion fails. Require the conditions of extendsfdf2 whenever the two-step sequence is used. PR target/127957 gcc/ChangeLog: * config/i386/i386.md (extendhfdf2): Require TARGET_80387 or TARGET_SSE2 && TARGET_SSE_MATH when not using TARGET_AVX512FP16. gcc/testsuite/ChangeLog: * gcc.target/i386/pr127957.c: New test. Diff: --- gcc/config/i386/i386.md | 4 +++- gcc/testsuite/gcc.target/i386/pr127957.c | 5 +++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 81e6b59eaaec..69d33dba8eb2 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -5598,7 +5598,9 @@ [(set (match_operand:DF 0 "register_operand") (float_extend:DF (match_operand:HF 1 "nonimmediate_operand")))] - "TARGET_AVX512FP16 || TARGET_F16C || TARGET_AVX512VL" + "TARGET_AVX512FP16 + || ((TARGET_F16C || TARGET_AVX512VL) + && (TARGET_80387 || (TARGET_SSE2 && TARGET_SSE_MATH)))" { if (!TARGET_AVX512FP16) { diff --git a/gcc/testsuite/gcc.target/i386/pr127957.c b/gcc/testsuite/gcc.target/i386/pr127957.c new file mode 100644 index 000000000000..9a19e6c6ea55 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr127957.c @@ -0,0 +1,5 @@ +/* PR target/127957 */ +/* { dg-do compile { target ia32 } } */ +/* { dg-options "-mgeneral-regs-only -mf16c" } */ + +double foo() { return __builtin_nansf16("nan"); }
