https://gcc.gnu.org/g:f9662f297b5f6869e15650e91649454e70aed4e5

commit f9662f297b5f6869e15650e91649454e70aed4e5
Author: Michael Meissner <[email protected]>
Date:   Tue Oct 20 00:58:03 2026 -0400

    Fix typo in the last change.
    
    2026-10-20  Michael Meissner  <[email protected]>
    
            * config/rs6000/float16.cc (bfloat16_to_v4sf_split): Fix typos in 
the
            last change.

Diff:
---
 gcc/config/rs6000/float16.cc | 21 +++++++++------------
 1 file changed, 9 insertions(+), 12 deletions(-)

diff --git a/gcc/config/rs6000/float16.cc b/gcc/config/rs6000/float16.cc
index 0cd8ce01e909..2876c1885de1 100644
--- a/gcc/config/rs6000/float16.cc
+++ b/gcc/config/rs6000/float16.cc
@@ -730,7 +730,7 @@ bfloat16_to_v4sf_split (rtx dest, rtx src)
          if (GET_CODE (op2) == NEG)
            {
              op2 = XEXP (op2, 0);
-             bfloat16_operation_as_v4sf (code, dest,
+             bfloat16_operation_as_v4sf (FMA, dest,
                                          op0,
                                          op1,
                                          op2,
@@ -738,7 +738,7 @@ bfloat16_to_v4sf_split (rtx dest, rtx src)
            }
 
          else
-           bfloat16_operation_as_v4sf (code, dest,
+           bfloat16_operation_as_v4sf (FMA, dest,
                                        op0,
                                        op1,
                                        op2,
@@ -746,7 +746,7 @@ bfloat16_to_v4sf_split (rtx dest, rtx src)
        }
 
       else
-       bfloat16_operation_as_v4sf (code, dest,
+       bfloat16_operation_as_v4sf (GET_CODE (arg), dest,
                                    XEXP (arg, 0),
                                    NULL_RTX,
                                    NULL_RTX,
@@ -771,17 +771,14 @@ bfloat16_to_v4sf_split (rtx dest, rtx src)
       op1 = XEXP (src, 1);
       op2 = XEXP (src, 2);
       if (GET_CODE (op2) == NEG)
-       {
-         op2 = XEXP (op2, 0);
-         bfloat16_operation_as_v4sf (code, dest,
-                                     op0,
-                                     op1,
-                                     op2,
-                                     FP16_FMS);
-       }
+       bfloat16_operation_as_v4sf (FMA, dest,
+                                   op0,
+                                   op1,
+                                   XEXP (op2, 0),
+                                   FP16_FMS);
 
       else
-       bfloat16_operation_as_v4sf (code, dest,
+       bfloat16_operation_as_v4sf (FMA, dest,
                                    op0,
                                    op1,
                                    op2,

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