https://gcc.gnu.org/g:5276e23da2b05340a31e83077e7d435238e5579c
commit r17-5450-g5276e23da2b05340a31e83077e7d435238e5579c Author: Soumya AR <[email protected]> Date: Mon Oct 19 17:35:59 2026 +0000 testsuite: Fix failing sve-asrd-2.c test foo_nonpow2 and foo_unsigned in sve-asrd-2.c expected an exact instruction sequence. After the scheduling change in r17-5105-gfd7c5910162acd the instructions come out in a different order, so both tests fail. Unfortunately I had tested the original patch on a slightly older branch and missed that commit. Fix this by making the test a bit loose by only matching sdiv/udiv. Committed as obvious. gcc/testsuite/ChangeLog: * gcc.target/aarch64/sve/sve-asrd-2.c (foo_nonpow2): Match only the predicated SDIV. (foo_unsigned): Likewise for UDIV. Signed-off-by: Soumya AR <[email protected]> Diff: --- gcc/testsuite/gcc.target/aarch64/sve/sve-asrd-2.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/gcc/testsuite/gcc.target/aarch64/sve/sve-asrd-2.c b/gcc/testsuite/gcc.target/aarch64/sve/sve-asrd-2.c index d4e29ab186ac..ea98cedb7632 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/sve-asrd-2.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/sve-asrd-2.c @@ -45,10 +45,9 @@ FOO (svint64_t) /* ** foo_nonpow2: -** mov (z[0-9]+\.s), #7 -** ptrue (p[0-7]).b, all -** sdiv (z[0-9]+\.s), \2/m, \3, \1 -** ret +** ... +** sdiv z[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s +** ... */ svint32_t foo_nonpow2 (svint32_t x) @@ -58,10 +57,9 @@ foo_nonpow2 (svint32_t x) /* ** foo_unsigned: -** mov (z[0-9]+\.s), #8 -** ptrue (p[0-7]).b, all -** udiv (z[0-9]+\.s), \2/m, \3, \1 -** ret +** ... +** udiv z[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s +** ... */ svuint32_t foo_unsigned (svuint32_t x)
