https://gcc.gnu.org/g:53b2365b22fe24124bace5c974f33730cd46b3db
commit r17-5460-g53b2365b22fe24124bace5c974f33730cd46b3db Author: Torbjörn SVENSSON <[email protected]> Date: Wed Oct 21 15:35:45 2026 +0200 doc: arm: Remove obsolete arm_v8_1m_lob-related target check entries In r17-5457-gc3c9cc3a6a7c19, I remove the implementation, but did not find the documentation due to a typo. This commit also removes them from the documentation. gcc/ChangeLog: * doc/sourcebuild.texi: Remove arm_thumb2_no_arm_v8_1_lob and arm_thumb2_ok_no_arm_v8_1_lob. Signed-off-by: Torbjörn SVENSSON <[email protected]> Diff: --- gcc/doc/sourcebuild.texi | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index db7250875668..e10747457e75 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -2366,16 +2366,6 @@ ARM Target supports executing the Armv8.1-M Mainline Low Overhead Loop instructions @code{DLS} and @code{LE}. Some multilibs may be incompatible with these options. -@item arm_thumb2_no_arm_v8_1_lob -ARM target where Thumb-2 is used without options but does not support -executing the Armv8.1-M Mainline Low Overhead Loop instructions -@code{DLS} and @code{LE}. - -@item arm_thumb2_ok_no_arm_v8_1_lob -ARM target generates Thumb-2 code for @code{-mthumb} but does not -support executing the Armv8.1-M Mainline Low Overhead Loop -instructions @code{DLS} and @code{LE}. - @item mbranch_protection_ok ARM target supporting @code{-mbranch-protection=standard}.
