https://gcc.gnu.org/g:cd7f479dfa3da1bde9bf331c647bc70a6185b4db
commit r17-5603-gcd7f479dfa3da1bde9bf331c647bc70a6185b4db Author: liuhongt <[email protected]> Date: Thu Oct 22 22:32:51 2026 -0700 i386: Add REG_EQUAL note for x86_cse vector constant copies After x86_cse replaces a vector constant load with a copy of the single vector set, add a REG_EQUAL note with the original CONST_VECTOR so that LRA can rematerialize the constant instead of spilling the copy. gcc/ChangeLog: * config/i386/i386-features.cc (replace_vector_const): Add a REG_EQUAL note with the original CONST_VECTOR. gcc/testsuite/ChangeLog: * gcc.target/i386/x86-cse-remat-1.c: New test. Diff: --- gcc/config/i386/i386-features.cc | 4 ++++ gcc/testsuite/gcc.target/i386/x86-cse-remat-1.c | 28 +++++++++++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc index f95bc41fb479..83768b3b2bc8 100644 --- a/gcc/config/i386/i386-features.cc +++ b/gcc/config/i386/i386-features.cc @@ -3866,6 +3866,10 @@ replace_vector_const (machine_mode vector_mode, rtx vector_const, PATTERN (insn) = set; INSN_CODE (insn) = -1; recog_memoized (insn); + /* Add a REG_EQUAL note with the original CONST_VECTOR so that LRA + can rematerialize it instead of spilling DEST. */ + if (REG_P (dest) && !CONST_INT_P (replace) && CONST_VECTOR_P (src)) + set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src)); if (dump_file) { fprintf (dump_file, "\nwith:\n\n"); diff --git a/gcc/testsuite/gcc.target/i386/x86-cse-remat-1.c b/gcc/testsuite/gcc.target/i386/x86-cse-remat-1.c new file mode 100644 index 000000000000..5d8136ab1f39 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/x86-cse-remat-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=x86-64-v3" } */ + +/* The zero vector stored in the loop is live across the calls. It + should be rematerialized, not spilled, so the stack doesn't need to + be realigned. */ + +extern void bar (void); +extern int cond (int); + +void +foo (int *__restrict a, int *__restrict b, int *__restrict c, int n) +{ + for (int i = 0; i < 8; i++) + a[i] = 0; + for (int j = 0; j < n; j++) + { + if (cond (j)) + bar (); + for (int i = 0; i < 8; i++) + b[i + 8 * j] = 0; + } + for (int i = 0; i < 8; i++) + c[i] = 0; +} + +/* { dg-final { scan-assembler-not "and\[lq\]\[ \t\]+\\\$-32, %\[re\]sp" } } */ +/* { dg-final { scan-assembler-not "vmovdq\[au\]\[ \t\]+%ymm\[0-9\]+, -?\[0-9\]*\\(%\[re\]\[sb\]p\\)" } } */
