https://gcc.gnu.org/g:5acdceb6e77753e54c3de1c7d3a73bf3d457ca85
commit r17-5788-g5acdceb6e77753e54c3de1c7d3a73bf3d457ca85 Author: Jeff Law <[email protected]> Date: Sun Nov 1 15:27:39 2026 -0700 [RISC-V][PR target/128139] Don't create pseudos when !can_create_pseudos_p on RISC-V Dumb mistake on my part. When I added a new path to call synthesize_add I didn't account for the possibility it could be called after the point where no new pseudos are allowed. The good news is that new path can handle synthesize_add returning false (no synthesis available) so we just need to return false from synthesize_add if the synthesis requires creating a new pseudo register (we could probably improve that further by re-using the output if it doesn't overlap the register input, but these paths should be very uncommon, so likely not worth the effort). Regression tested on riscv32-elf and riscv64-elf. K3, K1 and C920 are all queued. Pushing to the trunk. PR target/128139 gcc/ * config/riscv/riscv.cc (synthesize_add): Do not create pseudos when !can_create_pseudos_p. gcc/testsuite * gcc.target/riscv/pr128139.c: New test. Diff: --- gcc/config/riscv/riscv.cc | 22 ++++++++++++++-------- gcc/testsuite/gcc.target/riscv/pr128139.c | 12 ++++++++++++ 2 files changed, 26 insertions(+), 8 deletions(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index ab9354162fab..517e4f995775 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -16763,7 +16763,7 @@ synthesize_add (rtx operands[3]) shcount = 3; } - if (shcount != 0) + if (shcount != 0 && can_create_pseudo_p ()) { rtx x = force_reg (word_mode, GEN_INT (sext_hwi (ival >> shcount, 32))); x = gen_rtx_ASHIFT (word_mode, x, GEN_INT (shcount)); @@ -16787,7 +16787,8 @@ synthesize_add (rtx operands[3]) || ((ival % 4) == 0 && budget1 > riscv_integer_cost (ival >> 2, true)) || ((ival % 8) == 0 && budget1 - > riscv_integer_cost (ival >> 3, true)))) + > riscv_integer_cost (ival >> 3, true))) + && can_create_pseudo_p ()) { // Load the shifted constant into a temporary int shct = ctz_hwi (ival); @@ -16813,7 +16814,8 @@ synthesize_add (rtx operands[3]) then synthesize C' and use add.uw. */ if ((TARGET_64BIT && TARGET_ZBA) && (ival & HOST_WIDE_INT_UC (0xffffffff00000000)) == 0 - && riscv_integer_cost (sext_hwi (ival, 32), true) < budget1) + && riscv_integer_cost (sext_hwi (ival, 32), true) < budget1 + && can_create_pseudo_p ()) { /* Load the sign extended constant into a temporary. */ rtx tempreg = force_reg (word_mode, GEN_INT (sext_hwi (ival, 32))); @@ -16828,7 +16830,7 @@ synthesize_add (rtx operands[3]) /* If the negated constant is cheaper than the original, then negate the constant and use sub. */ - if (budget2 < budget1) + if (budget2 < budget1 && can_create_pseudo_p ()) { // load -INTVAL (operands[2]) into a temporary rtx tmp = force_reg (word_mode, GEN_INT (-INTVAL (operands[2]))); @@ -16841,10 +16843,14 @@ synthesize_add (rtx operands[3]) /* No add synthesis was found. Synthesize the constant into a temporary and use that. */ - rtx x = force_reg (word_mode, operands[2]); - x = gen_rtx_PLUS (word_mode, operands[1], x); - emit_insn (gen_rtx_SET (operands[0], x)); - return true; + if (can_create_pseudo_p ()) + { + rtx x = force_reg (word_mode, operands[2]); + x = gen_rtx_PLUS (word_mode, operands[1], x); + emit_insn (gen_rtx_SET (operands[0], x)); + return true; + } + return false; } /* Synthesize OPERANDS[0] = OPERANDS[1] + OPERANDS[2]. diff --git a/gcc/testsuite/gcc.target/riscv/pr128139.c b/gcc/testsuite/gcc.target/riscv/pr128139.c new file mode 100644 index 000000000000..bd72baca3621 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/pr128139.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ + +void b(char *); + +void a(long off, void *h) +{ + char buf[8192]; + b(buf); + __builtin_eh_return (off, h); +} + +
