https://gcc.gnu.org/g:6216bfb5b78df1c4eb36db8cc6568d936c23350d
commit r17-5800-g6216bfb5b78df1c4eb36db8cc6568d936c23350d Author: Hu, Lin1 <[email protected]> Date: Wed Oct 28 14:43:54 2026 +0800 testsuite: Only scan vpinsrw for 64-bit in vect-bfloat16-2b.c [PR128169] r17-5483 changed the vpinsrw count of this -mno-avx512bw test, and the -m32 count no longer matches. Since AVX-512BW is practically a baseline for all AVX-512 capable processors anyway, only scan vpinsrw for 64-bit targets. gcc/testsuite/ChangeLog: PR target/128169 * gcc.target/i386/vect-bfloat16-2b.c: Scan vpinsrw only for !ia32. Diff: --- gcc/testsuite/gcc.target/i386/vect-bfloat16-2b.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/i386/vect-bfloat16-2b.c b/gcc/testsuite/gcc.target/i386/vect-bfloat16-2b.c index 0d1e14d6eb66..1658452237f8 100644 --- a/gcc/testsuite/gcc.target/i386/vect-bfloat16-2b.c +++ b/gcc/testsuite/gcc.target/i386/vect-bfloat16-2b.c @@ -14,9 +14,9 @@ /* { dg-final { scan-assembler-times "vpbroadcastw" 7 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler-times "vpblendw" 4 { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler-times "vpinsrw" 32 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler-times "vpbroadcastw" 6 { target ia32 } } } */ /* { dg-final { scan-assembler-times "vpblendw" 3 { target ia32 } } } */ -/* { dg-final { scan-assembler-times "vpinsrw" 68 { target ia32 } } } */ /* { dg-final { scan-assembler-times "vpblendd" 3 } } */
