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• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwsubu.wv to vwsubu.wx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwsubu.wv to vwsubu.wx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwsubu.wv combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwsubu.wv combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow VLS types using up to LMUL 8 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow VLS types using up to LMUL 8 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Fix slide pattern recognition [PR122124] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Fix slide pattern recognition [PR122124] Jeff Law via Gcc-cvs
• [gcc r16-4925] [RISC-V][SH][PR rtl-optimization/67731] Improve logical IOR of single bit bitfields Jeff Law via Gcc-cvs
• [gcc r16-4924] [RISC-V] Reorder ready queue slightly to avoid unnecessary vsetvl instructions Jeff Law via Gcc-cvs
• [gcc r15-10472] Fortran: IS_CONTIGUOUS and pointers to non-contiguous targets [PR114023] Harald Anlauf via Gcc-cvs
• [gcc r15-10471] Fortran: fix TRANSFER of subarray component references [PR122386] Harald Anlauf via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/118945][PATCH v3] RISC-V: Add 'prefer_agnostic' tune parameter for vector policies Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/118945][PATCH v3] RISC-V: Add 'prefer_agnostic' tune parameter for vector policies Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwaddu.wv to vwaddu.wx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwaddu.wv to vwaddu.wx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwmulu.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwmulu.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ISC-V: Add test for vec_duplicate + vwaddu.wv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ISC-V: Add test for vec_duplicate + vwaddu.wv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fixup merge conflict Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fixup merge conflict Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Configure Profiles definitions in the definition file. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Configure Profiles definitions in the definition file. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Fix type of CFA during stack probe [PR122114] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Fix type of CFA during stack probe [PR122114] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122147] Avoid creating (subreg (mem)) in RISC-V port Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122147] Avoid creating (subreg (mem)) in RISC-V port Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR rtl-optimization/121937] Don't call neg_poly_int_rtx with a vector mode Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR rtl-optimization/121937] Don't call neg_poly_int_rtx with a vector mode Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust ABI specification in recently added Andes tests Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust ABI specification in recently added Andes tests Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122106] Add missing predicate on crc expanders Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122106] Add missing predicate on crc expanders Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Clarify if_info.original_cost. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Clarify if_info.original_cost. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add missing define_insn_reservation to tt-ascalon-d8.md [PR121982] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add missing define_insn_reservation to tt-ascalon-d8.md [PR121982] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122051] Fix pmode_reg_or_uimm5_operand for thead vector Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122051] Fix pmode_reg_or_uimm5_operand for thead vector Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH][PR target/121778] RISC-V: Improve rotation detection for RISC-V Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH][PR target/121778] RISC-V: Improve rotation detection for RISC-V Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Optimize clear-lowest-set-bit sequence when ctz is nearby Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Optimize clear-lowest-set-bit sequence when ctz is nearby Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix can_find_related_mode_p for VLS types Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix can_find_related_mode_p for VLS types Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for mul Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for mul Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Correct lmul estimation Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Correct lmul estimation Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar widening floating-point add Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar widening floating-point add Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121983] Fix unprotected REGNO invocation Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121983] Fix unprotected REGNO invocation Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Improve slide patterns recognition Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Improve slide patterns recognition Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwsubu.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwsubu.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Only Save/Restore required registers for ILP32E/LP64E Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Only Save/Restore required registers for ILP32E/LP64E Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar widening floating-point multiply Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar widening floating-point multiply Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvdot ISA extension. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvdot ISA extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwaddu.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwaddu.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for widen-mul Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for widen-mul Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR tree-optimization/58727] Don't over-simplify constants` Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR tree-optimization/58727] Don't over-simplify constants` Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust recently added test Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust recently added test Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwaddu.vv to vwaddu.vx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwaddu.vv to vwaddu.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121213] Avoid unnecessary sign extension in amoswap sequence Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121213] Avoid unnecessary sign extension in amoswap sequence Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow profiles input in '--with-arch' option. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow profiles input in '--with-arch' option. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Imply zicsr for sdtrig and ssstrict extensions. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Imply zicsr for sdtrig and ssstrict extensions. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Widening-Mul: Refine build_and_insert_cast when rhs is cast Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Widening-Mul: Refine build_and_insert_cast when rhs is cast Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix vendor intrinsic tests for disabled multilib configurations Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix vendor intrinsic tests for disabled multilib configurations Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support vnclip idiom testcase [PR120378] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support vnclip idiom testcase [PR120378] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Match: Support SAT_TRUNC variant NARROW_CLIP Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Match: Support SAT_TRUNC variant NARROW_CLIP Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Suppress cross CC sibcall optimization from vector Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Suppress cross CC sibcall optimization from vector Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add min/max patterns for ifcvt. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add min/max patterns for ifcvt. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix typo in tt-ascalon-d8's pipeline description [PR121878] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix typo in tt-ascalon-d8's pipeline description [PR121878] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar dual widening floating-point sub Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar dual widening floating-point sub Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single widening floating-point sub Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single widening floating-point sub Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single widening floating-point add Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single widening floating-point add Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust tt-ascalon-d8 branch cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust tt-ascalon-d8 branch cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point sub Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point sub Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point reverse sub Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point reverse sub Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point add Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point add Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar IEEE floating-point max Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar IEEE floating-point max Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: introduce the dep_fusion pass Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: introduce the dep_fusion pass Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: introduce the dep_fusion pass Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: introduce the dep_fusion pass Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix ordering of pipeline models Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix ordering of pipeline models Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvpackfph ISA extension. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvpackfph ISA extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsub.vv unsigned combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsub.vv unsigned combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsub.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsub.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vnmsub.vv to vnmsub.vx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vnmsub.vv to vnmsub.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] dep_fusion: Fix if target does not have macro fusion [PR121835] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] dep_fusion: Fix if target does not have macro fusion [PR121835] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvsintload ISA extension. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvsintload ISA extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvbfhcvt ISA extension. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvbfhcvt ISA extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add tt-ascalon-d8 pipeline description Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add tt-ascalon-d8 pipeline description Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmadd.vv to vmadd.vx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmadd.vv to vmadd.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow errors to be suppressed when parsing architectures Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow errors to be suppressed when parsing architectures Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmadd.vv unsigned combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmadd.vv unsigned combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust the vmacc.vx combine test cases Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust the vmacc.vx combine test cases Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmadd.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmadd.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix extension subset check in riscv_can_inline_p Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix extension subset check in riscv_can_inline_p Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesperf ISA extension. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesperf ISA extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesbfhcvt ISA extension. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesbfhcvt ISA extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add basic XAndes vendor extension support. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add basic XAndes vendor extension support. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix is_vlmax_len_p and use for strided ops. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix is_vlmax_len_p and use for strided ops. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Zbb extension sext testcase. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Zbb extension sext testcase. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update Zba 'shNadd.uw' testcase.` Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update Zba 'shNadd.uw' testcase.` Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove unused print_ext_doc_entry function [NFC] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove unused print_ext_doc_entry function [NFC] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve initial RTL generation for SImode adds on rv64 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve initial RTL generation for SImode adds on rv64 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case for unsigned scalar SAT_MUL form 4 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case for unsigned scalar SAT_MUL form 4 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar IEEE floating-point min Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar IEEE floating-point min Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsac.vv unsigned combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsac.vv unsigned combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsac.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsac.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vnmsac.vv to vnmsac.vx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vnmsac.vv to vnmsac.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar floating-point min Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar floating-point min Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Remove xfail marker on RISC-V test Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Remove xfail marker on RISC-V test Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Fix vf_vfmul and vf_vfrdiv Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Fix vf_vfmul and vf_vfrdiv Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed] RISC-V Testsuite hygiene Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed] RISC-V Testsuite hygiene Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] More RISC-V testsuite hygiene Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] More RISC-V testsuite hygiene Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Add pattern for vector-scalar single-width floating-point multiply Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Add pattern for vector-scalar single-width floating-point multiply Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Add pattern for reverse floating-point divide Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Add pattern for reverse floating-point divide Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix RISC-V bootstrap Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix RISC-V bootstrap Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmacc.vv unsigned combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmacc.vv unsigned combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmacc.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmacc.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmacc.vv to vmacc.vx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmacc.vv to vmacc.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Replace deprecated FUNCTION_VALUE/LIBCALL_VALUE macros with target hooks Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Replace deprecated FUNCTION_VALUE/LIBCALL_VALUE macros with target hooks Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix invalid right shift count with recent ifcvt changes Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix invalid right shift count with recent ifcvt changes Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/120553] Improve selecting between constants based on sign bit test Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/120553] Improve selecting between constants based on sign bit test Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for scalar unsigned SAT_MUL form 3 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for scalar unsigned SAT_MUL form 3 Jeff Law via Gcc-cvs

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