On Thu, Dec 15, 2016 at 7:55 PM, Andrew Senkevich
<andrew.n.senkev...@gmail.com> wrote:
> 2016-12-15 19:51 GMT+03:00 Uros Bizjak <ubiz...@gmail.com>:
>> On Thu, Dec 15, 2016 at 2:31 PM, Andrew Senkevich
>> <andrew.n.senkev...@gmail.com> wrote:
>>> 2016-12-14 22:55 GMT+03:00 Uros Bizjak <ubiz...@gmail.com>:
>>>> On Wed, Dec 14, 2016 at 8:04 PM, Andrew Senkevich
>>>> <andrew.n.senkev...@gmail.com> wrote:
>>>>
>>>>> here is the second part of k-mask intrinsics, is it Ok?
>>>>
>>>>> --- a/gcc/config/i386/sse.md
>>>>> +++ b/gcc/config/i386/sse.md
>>>>> @@ -1309,12 +1309,30 @@
>>>>> ;; Mask variant shift mnemonics
>>>>> (define_code_attr mshift [(ashift "shiftl") (lshiftrt "shiftr")])
>>>>>
>>>>> +(define_expand "kmovb"
>>>>> + [(set (match_operand:QI 0 "nonimmediate_operand")
>>>>> + (match_operand:QI 1 "nonimmediate_operand"))]
>>>>> + "TARGET_AVX512DQ
>>>>> + && !(MEM_P (operands[0]) && MEM_P (operands[1]))")
>>>>> +
>>>>> (define_expand "kmovw"
>>>>> [(set (match_operand:HI 0 "nonimmediate_operand")
>>>>> (match_operand:HI 1 "nonimmediate_operand"))]
>>>>> "TARGET_AVX512F
>>>>> && !(MEM_P (operands[0]) && MEM_P (operands[1]))")
>>>>>
>>>>> +(define_expand "kmovd"
>>>>> + [(set (match_operand:SI 0 "nonimmediate_operand")
>>>>> + (match_operand:SI 1 "nonimmediate_operand"))]
>>>>> + "TARGET_AVX512BW
>>>>> + && !(MEM_P (operands[0]) && MEM_P (operands[1]))")
>>>>> +
>>>>> +(define_expand "kmovq"
>>>>> + [(set (match_operand:DI 0 "nonimmediate_operand")
>>>>> + (match_operand:DI 1 "nonimmediate_operand"))]
>>>>> + "TARGET_AVX512BW
>>>>> + && !(MEM_P (operands[0]) && MEM_P (operands[1]))")
>>>>> +
>>>>> (define_insn "k<code><mode>"
>>>>> [(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k")
>>>>> (any_logic:SWI1248_AVX512BW
>>>>
>>>> All the above patterns can be macroized with the following patch:
>>>>
>>>> --cut here--
>>>> Index: sse.md
>>>> ===================================================================
>>>> --- sse.md (revision 243651)
>>>> +++ sse.md (working copy)
>>>> @@ -1309,9 +1309,9 @@
>>>> ;; Mask variant shift mnemonics
>>>> (define_code_attr mshift [(ashift "shiftl") (lshiftrt "shiftr")])
>>>>
>>>> -(define_expand "kmovw"
>>>> - [(set (match_operand:HI 0 "nonimmediate_operand")
>>>> - (match_operand:HI 1 "nonimmediate_operand"))]
>>>> +(define_expand "kmov<mskmodesuffix>"
>>>> + [(set (match_operand:SWI1248_AVX512BWDQ 0 "nonimmediate_operand")
>>>> + (match_operand:SWI1248_AVX512BWDQ 1 "nonimmediate_operand"))]
>>>> "TARGET_AVX512F
>>>> && !(MEM_P (operands[0]) && MEM_P (operands[1]))")
>>>>
>>>> --cut here--
>>>>
>>>> Please also post ChangeLog entry.
>>>
>>> Thanks,
>>>
>>> here is with ChangeLogs and renamed internal __builtin_ia32_kmov* to
>>> match instruction names.
>>> For __builtin_ia32_kmov16 change I will follow up for update in branches.
>>>
>>> Regtested on x86_64-linux-gnu, Ok for trunk?
>>
>> OK.
>
> Thanks,
>
> here is one more part for kadd{b,w,d,q}, is it ok?
>
> gcc/
> * config/i386/avx512bwintrin.h: Add new k-mask intrinsics.
> * config/i386/avx512dqintrin.h: Ditto.
> * config/i386/avx512fintrin.h: Ditto.
> * config/i386/i386-builtin.def (__builtin_ia32_kaddqi,
> __builtin_ia32_kaddhi, __builtin_ia32_kaddsi,
> __builtin_ia32_kadddi): New.
> * config/i386/sse.md (kadd<mode>): New.
>
> gcc/testsuite/
> * gcc.target/i386/avx512bw-kaddd-1.c: New test.
> * gcc.target/i386/avx512bw-kaddq-1.c: Ditto.
> * gcc.target/i386/avx512dq-kaddb-1.c: Ditto.
> * gcc.target/i386/avx512f-kaddw-1.c: Ditto.
OK.
I'll commit the patch to mainline later today.
Thanks,
Uros.
