> > __ATOMIC_HLE_XACQ_CONSUME
> > __ATOMIC_HLE_XACQ_ACQUIRE
> > __ATOMIC_HLE_XACQ_ACQ_REL
> > __ATOMIC_HLE_XACQ_SEQ_CST
> > __ATOMIC_HLE_XREL_RELEASE
> > __ATOMIC_HLE_XREL_ACQ_REL
> > __ATOMIC_HLE_XREL_SEQ_CST
> > or whatever happens to be valid... Doesn't really scale to adding
> > more new bits later, but perhaps that doesn't matter.
> I'd prefer not to predefine these. They can be surely defined in some
I think only a very small number make sense for x86 HLE, two, if you include
weak MOV RELEASE
three. That's only one more than currently.
a...@linux.intel.com -- Speaking for myself only.