There's no need for each branch-over-branch to choose
its own label format.
gcc:
* config/aarch64/aarch64.cc (aarch64_gen_far_branch): Drop
dest argument; always use "L".
* config/aarch64/aarch64.md: Update to match.
* config/aarch64/aarch64-protos.h: Update to match.
---
gcc/config/aarch64/aarch64-protos.h | 2 +-
gcc/config/aarch64/aarch64.cc | 4 ++--
gcc/config/aarch64/aarch64.md | 12 ++++++------
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-protos.h
b/gcc/config/aarch64/aarch64-protos.h
index 36bd88593ff..d1b82e5a5b9 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -1013,7 +1013,7 @@ unsigned aarch64_debugger_regno (unsigned);
unsigned aarch64_trampoline_size (void);
void aarch64_asm_output_labelref (FILE *, const char *);
void aarch64_cpu_cpp_builtins (cpp_reader *);
-const char * aarch64_gen_far_branch (rtx *, int, const char *, const char *);
+const char * aarch64_gen_far_branch (rtx *, int, const char *);
const char * aarch64_output_probe_stack_range (rtx, rtx);
const char * aarch64_output_probe_sve_stack_clash (rtx, rtx, rtx, rtx);
void aarch64_err_no_fpadvsimd (machine_mode);
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index d30c9c75e42..d9bd939c234 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -1338,13 +1338,13 @@ strip_offset_and_salt (rtx addr, poly_int64 *offset)
/* Generate code to enable conditional branches in functions over 1 MiB. */
const char *
-aarch64_gen_far_branch (rtx * operands, int pos_label, const char * dest,
+aarch64_gen_far_branch (rtx * operands, int pos_label,
const char * branch_format)
{
rtx_code_label * tmp_label = gen_label_rtx ();
char label_buf[256];
char buffer[128];
- ASM_GENERATE_INTERNAL_LABEL (label_buf, dest,
+ ASM_GENERATE_INTERNAL_LABEL (label_buf, "L",
CODE_LABEL_NUMBER (tmp_label));
const char *label_ptr = targetm.strip_name_encoding (label_buf);
rtx dest_label = operands[pos_label];
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index dc2be815ede..b3e76158688 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -812,7 +812,7 @@
"!aarch64_track_speculation"
{
if (get_attr_length (insn) == 8)
- return aarch64_gen_far_branch (operands, 1, "Lcb", "<inv_cb>\\t%<w>0, ");
+ return aarch64_gen_far_branch (operands, 1, "<inv_cb>\\t%<w>0, ");
else
return "<cbz>\\t%<w>0, %l1";
}
@@ -845,7 +845,7 @@
if (get_attr_length (insn) == 8)
{
if (get_attr_far_branch (insn) == FAR_BRANCH_YES)
- return aarch64_gen_far_branch (operands, 1, "Ltb",
+ return aarch64_gen_far_branch (operands, 1,
"<inv_tb>\\t%<w>0, <sizem1>, ");
else
{
@@ -892,7 +892,7 @@
{
return (get_attr_far_branch (insn) == FAR_BRANCH_NO)
? "cb<INT_CMP:cmp_op>\\t%<w>0, %<w>1, %l2"
- : aarch64_gen_far_branch (operands, 2, "L",
+ : aarch64_gen_far_branch (operands, 2,
"cb<INT_CMP:inv_cmp_op>\\t%<w>0, %<w>1, ");
}
[(set_attr "type" "branch")
@@ -923,7 +923,7 @@
{
return (get_attr_far_branch (insn) == FAR_BRANCH_NO)
? "cb<SHORT:cmpbr_suffix><INT_CMP:cmp_op>\\t%<w>0, %<w>1, %l2"
- : aarch64_gen_far_branch (operands, 2, "L",
+ : aarch64_gen_far_branch (operands, 2,
"cb<SHORT:cmpbr_suffix><INT_CMP:inv_cmp_op>\\t%<w>0, %<w>1, ");
}
[(set_attr "type" "branch")
@@ -956,7 +956,7 @@
but the "." is required for SVE conditions. */
bool use_dot_p = GET_MODE (operands[1]) == CC_NZCmode;
if (get_attr_length (insn) == 8)
- return aarch64_gen_far_branch (operands, 2, "Lbcond",
+ return aarch64_gen_far_branch (operands, 2,
use_dot_p ? "b.%M0\\t" : "b%M0\\t");
else
return use_dot_p ? "b.%m0\\t%l2" : "b%m0\\t%l2";
@@ -1050,7 +1050,7 @@
if (get_attr_length (insn) == 8)
{
if (get_attr_far_branch (insn) == 1)
- return aarch64_gen_far_branch (operands, 2, "Ltb",
+ return aarch64_gen_far_branch (operands, 2,
"<inv_tb>\\t%<ALLI:w>0, %1, ");
else
{
