On 04/08/2025 22:18, Richard Henderson wrote:
gcc:
* config/aarch64/aarch64.cc (aarch64_if_then_else_costs):
Use aarch64_cb_rhs to match CB insns.
---
gcc/config/aarch64/aarch64.cc | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index ff9243ea732..df01ef3fea2 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -14393,6 +14393,11 @@ aarch64_if_then_else_costs (rtx op0, rtx op1, rtx op2,
int *cost, bool speed)
return true;
else
{
+ if (TARGET_CMPBR && aarch64_cb_rhs (cmpcode, comparator))
+ {
+ *cost += rtx_cost (inner, VOIDmode, cmpcode, 0, speed);
+ return true;
+ }
if (cmpcode == NE || cmpcode == EQ)
{
if (comparator == const0_rtx)
This should check that the mode is SI/DI, because compare-and-branch
with immediates are only allowed for 32bit/64bit comparisons