On 5/31/2026 9:36 PM, Wang Yaduo wrote:
> from overlap_op_by_pieces. I'd expect the branch cost to be higher to
> encourage the compiler to if-convert aggressively to avoid branch
> mispredictions, but I'm not at all familiar with this core, so I'd go
> with Wang's recommendation here.
I think enabling overlap_op_by_pieces could indeed be beneficial.
But I haven't measured its performance impact, though, so I left it
disabled for now to be conservative.
Sounds reasonable. You can always change it in a follow-up.
> I'd be particularly curious if this design is showing that the
> zero-stride-load idiom is meaningfully faster than the alternatives. I
> think that would be the first core where this was true.
Yes, I was informed that we have done the optimization in core.
That's great. We fixed our Veyron V2 implementation, but only far
enough to make it not be terrible performance wise. My recollection was
the K1 was in a roughly similar boat -- the zero stride load idiom
wasn't terrible, but it was generally better to load the value, then
move+broadcast it across the vector register.
Jeff