On Tue, Aug 25, 2026 at 4:24 AM H.J. Lu <[email protected]> wrote:
>
> commit f2609a4c653a4993eec7ed9a2ad05caf936f0178
> Author: Roger Sayle <[email protected]>
> Date:   Sat May 16 08:44:06 2026 +0100
>
>     x86_64: Handle hard registers in TImode STV with inter-unit moves.
>
> checks TARGET_AVX for vpinsrq and vpextrq.  But pinsrq and pextrq are
> added in SSE4_1.  Check TARGET_SSE4_1 instead of TARGET_AVX for pinsrq
> and pextrq.
>
> gcc/
>
> PR target/127020
> * config/i386/i386-features.cc
> (timode_scalar_chain::compute_convert_gain): Check TARGET_SSE4_1
> instead of TARGET_AVX for pinsrq and pextrq.
>
> gcc/testsuite/
>
> PR target/127020
> * gcc.target/i386/sse4_1-stv-14.c: New test.

OK.

Thanks,
Uros.

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