From: Pan Li <[email protected]>

Like v[sz]ext.vf8, we continue the support for vfw{add,sub,mul}.vv.

The below test suites are passed for this patch:
1. The rv64gcv fully regression tests.

Pan Li (4):
  RISC-V: Allow RVV register overlap for vfw{add,sub,mul}.vv
  RISC-V: Add test cases for vfwadd.vv reg overlap
  RISC-V: Add test cases for vfwsub.vv reg overlap
  RISC-V: Add test cases for vfwmul.vv reg overlap

 gcc/config/riscv/vector.md                    | 20 +++++++++----------
 .../autovec/group_overlap/vfwadd_vv-f16-m1.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwadd_vv-f16-m2.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwadd_vv-f16-m4.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwadd_vv-f16-mf2.c | 19 ++++++++++++++++++
 .../autovec/group_overlap/vfwadd_vv-f16-mf4.c | 19 ++++++++++++++++++
 .../autovec/group_overlap/vfwadd_vv-f32-m1.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwadd_vv-f32-m2.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwadd_vv-f32-m4.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwadd_vv-f32-mf2.c | 19 ++++++++++++++++++
 .../autovec/group_overlap/vfwmul_vv-f16-m1.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwmul_vv-f16-m2.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwmul_vv-f16-m4.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwmul_vv-f16-mf2.c | 19 ++++++++++++++++++
 .../autovec/group_overlap/vfwmul_vv-f16-mf4.c | 19 ++++++++++++++++++
 .../autovec/group_overlap/vfwmul_vv-f32-m1.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwmul_vv-f32-m2.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwmul_vv-f32-m4.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwmul_vv-f32-mf2.c | 19 ++++++++++++++++++
 .../autovec/group_overlap/vfwsub_vv-f16-m1.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwsub_vv-f16-m2.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwsub_vv-f16-m4.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwsub_vv-f16-mf2.c | 19 ++++++++++++++++++
 .../autovec/group_overlap/vfwsub_vv-f16-mf4.c | 19 ++++++++++++++++++
 .../autovec/group_overlap/vfwsub_vv-f32-m1.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwsub_vv-f32-m2.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwsub_vv-f32-m4.c  | 17 ++++++++++++++++
 .../autovec/group_overlap/vfwsub_vv-f32-mf2.c | 19 ++++++++++++++++++
 28 files changed, 487 insertions(+), 10 deletions(-)
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwadd_vv-f16-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwadd_vv-f16-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwadd_vv-f16-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwadd_vv-f16-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwadd_vv-f16-mf4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwadd_vv-f32-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwadd_vv-f32-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwadd_vv-f32-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwadd_vv-f32-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwmul_vv-f16-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwmul_vv-f16-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwmul_vv-f16-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwmul_vv-f16-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwmul_vv-f16-mf4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwmul_vv-f32-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwmul_vv-f32-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwmul_vv-f32-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwmul_vv-f32-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_vv-f16-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_vv-f16-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_vv-f16-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_vv-f16-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_vv-f16-mf4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_vv-f32-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_vv-f32-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_vv-f32-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_vv-f32-mf2.c

-- 
2.43.0

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