gcc/ChangeLog:
* common/config/i386/cpuinfo.h
(get_intel_cpu): Handle Coral Rapids.
* common/config/i386/i386-common.cc (processor_name):
Add Coral Rapids.
(processor_alias_table): Ditto.
* common/config/i386/i386-cpuinfo.h (enum processor_types):
Add INTEL_CORALRAPIDS.
* config.gcc: Add -march=coralrapids.
* config/i386/driver-i386.cc (host_detect_local_cpu): Handle
coralrapids.
* config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
* config/i386/i386-options.cc (processor_cost_table): Ditto.
(m_CORALRAPIDS): New.
* config/i386/i386.h (enum processor_type): Ditto.
* config/i386/x86-tune-sched.cc
(ix86_issue_rate): Add Coral Rapids.
* config/i386/x86-tune.def
(X86_TUNE_AVOID_256FMA_CHAINS): Enable for Coral Rapids.
* doc/extend.texi: Add Coral Rapids documentation.
* doc/invoke.texi: Ditto.
gcc/testsuite/ChangeLog:
* g++.target/i386/mv16.C: Ditto.
* gcc.target/i386/funcspec-56.inc: Handle new march.
Co-authored-by: Sun, Qin <[email protected]>
---
gcc/common/config/i386/cpuinfo.h | 8 ++++++++
gcc/common/config/i386/i386-common.cc | 3 +++
gcc/common/config/i386/i386-cpuinfo.h | 1 +
gcc/config.gcc | 2 +-
gcc/config/i386/driver-i386.cc | 3 +++
gcc/config/i386/i386-c.cc | 8 ++++++++
gcc/config/i386/i386-options.cc | 4 +++-
gcc/config/i386/i386.h | 3 +++
gcc/config/i386/x86-tune-sched.cc | 1 +
gcc/config/i386/x86-tune.def | 3 ++-
gcc/doc/extend.texi | 3 +++
gcc/doc/invoke.texi | 13 +++++++++++++
gcc/testsuite/g++.target/i386/mv16.C | 6 ++++++
gcc/testsuite/gcc.target/i386/funcspec-56.inc | 1 +
14 files changed, 56 insertions(+), 3 deletions(-)
diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h
index 5febcdb9b75..e0aae0b5aac 100644
--- a/gcc/common/config/i386/cpuinfo.h
+++ b/gcc/common/config/i386/cpuinfo.h
@@ -735,6 +735,14 @@ get_intel_cpu (struct __processor_model *cpu_model,
cpu_model->__cpu_type = INTEL_COREI7;
cpu_model->__cpu_subtype = INTEL_COREI7_DIAMONDRAPIDS;
break;
+ case 0x08:
+ /* Coral Rapids. */
+ cpu = "coralrapids";
+ CHECK___builtin_cpu_is ("corei7");
+ CHECK___builtin_cpu_is ("coralrapids");
+ cpu_model->__cpu_type = INTEL_COREI7;
+ cpu_model->__cpu_subtype = INTEL_COREI7_CORALRAPIDS;
+ break;
default:
break;
}
diff --git a/gcc/common/config/i386/i386-common.cc
b/gcc/common/config/i386/i386-common.cc
index c368f5040ba..8c93e357a04 100644
--- a/gcc/common/config/i386/i386-common.cc
+++ b/gcc/common/config/i386/i386-common.cc
@@ -2372,6 +2372,7 @@ const char *const processor_names[] =
"pantherlake",
"diamondrapids",
"novalake",
+ "coralrapids",
"intel",
"lujiazui",
"yongfeng",
@@ -2522,6 +2523,8 @@ const pta processor_alias_table[] =
M_CPU_SUBTYPE (INTEL_COREI7_NOVALAKE), P_PROC_AVX10_2},
{"razorlake", PROCESSOR_NOVALAKE, CPU_HASWELL, PTA_NOVALAKE,
M_CPU_SUBTYPE (INTEL_COREI7_NOVALAKE), P_PROC_AVX10_2},
+ {"coralrapids", PROCESSOR_CORALRAPIDS, CPU_HASWELL, PTA_CORALRAPIDS,
+ M_CPU_SUBTYPE (INTEL_COREI7_CORALRAPIDS), P_PROC_AVX10_2},
{"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL,
M_CPU_TYPE (INTEL_BONNELL), P_PROC_SSSE3},
{"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL,
diff --git a/gcc/common/config/i386/i386-cpuinfo.h
b/gcc/common/config/i386/i386-cpuinfo.h
index 79815bd7e51..431ebc060fa 100644
--- a/gcc/common/config/i386/i386-cpuinfo.h
+++ b/gcc/common/config/i386/i386-cpuinfo.h
@@ -114,6 +114,7 @@ enum processor_subtypes
HYGONFAM18H_C86_4G_M6,
HYGONFAM18H_C86_4G_M7,
HYGONFAM18H_C86_4G_M8,
+ INTEL_COREI7_CORALRAPIDS,
CPU_SUBTYPE_MAX
};
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 1466a37c50e..cf3d99f2e5a 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -784,7 +784,7 @@ sapphirerapids alderlake rocketlake eden-x2 nano nano-1000
nano-2000 nano-3000 \
nano-x2 eden-x4 nano-x4 lujiazui yongfeng shijidadao x86-64 x86-64-v2 \
x86-64-v3 x86-64-v4 sierraforest graniterapids graniterapids-d grandridge \
arrowlake arrowlake-s clearwaterforest pantherlake diamondrapids novalake \
-c86-4g-m4 c86-4g-m6 c86-4g-m7 c86-4g-m8 native"
+c86-4g-m4 c86-4g-m6 c86-4g-m7 c86-4g-m8 coralrapids native"
# Additional x86 processors supported by --with-cpu=. Each processor
# MUST be separated by exactly one space.
diff --git a/gcc/config/i386/driver-i386.cc b/gcc/config/i386/driver-i386.cc
index c7fb27769c7..23c340ee682 100644
--- a/gcc/config/i386/driver-i386.cc
+++ b/gcc/config/i386/driver-i386.cc
@@ -614,6 +614,9 @@ const char *host_detect_local_cpu (int argc, const char
**argv)
/* This is unknown CPU. */
if (has_feature (FEATURE_AVX512F))
{
+ /* Assume Coral Rapids. */
+ if (has_feature (FEATURE_AVX10VPMLDSABFLYDQ))
+ cpu = "coralrapids";
/* Assume Diamond Rapids. */
if (has_feature (FEATURE_AMX_FP8))
cpu = "diamondrapids";
diff --git a/gcc/config/i386/i386-c.cc b/gcc/config/i386/i386-c.cc
index 15a5e67836b..a895965d439 100644
--- a/gcc/config/i386/i386-c.cc
+++ b/gcc/config/i386/i386-c.cc
@@ -319,6 +319,11 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
def_or_undef (parse_in, "__c86_4g_m8");
def_or_undef (parse_in, "__c86_4g_m8__");
break;
+ case PROCESSOR_CORALRAPIDS:
+ def_or_undef (parse_in, "__coralrapids");
+ def_or_undef (parse_in, "__coralrapids__");
+ break;
+
/* use PROCESSOR_max to not set/unset the arch macro. */
case PROCESSOR_max:
break;
@@ -539,6 +544,9 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
case PROCESSOR_C86_4G_M8:
def_or_undef (parse_in, "__tune_c86_4g_m8__");
break;
+ case PROCESSOR_CORALRAPIDS:
+ def_or_undef (parse_in, "__tune_coralrapids__");
+ break;
case PROCESSOR_INTEL:
case PROCESSOR_GENERIC:
break;
diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc
index 7b5d9f416f6..9bcd7b9fd6b 100644
--- a/gcc/config/i386/i386-options.cc
+++ b/gcc/config/i386/i386-options.cc
@@ -133,11 +133,12 @@ along with GCC; see the file COPYING3. If not see
#define m_PANTHERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_PANTHERLAKE)
#define m_DIAMONDRAPIDS (HOST_WIDE_INT_1U<<PROCESSOR_DIAMONDRAPIDS)
#define m_NOVALAKE (HOST_WIDE_INT_1U<<PROCESSOR_NOVALAKE)
+#define m_CORALRAPIDS (HOST_WIDE_INT_1U<<PROCESSOR_CORALRAPIDS)
#define m_CORE_AVX512 (m_SKYLAKE_AVX512 | m_CANNONLAKE \
| m_ICELAKE_CLIENT | m_ICELAKE_SERVER | m_CASCADELAKE \
| m_TIGERLAKE | m_COOPERLAKE | m_SAPPHIRERAPIDS \
| m_ROCKETLAKE | m_GRANITERAPIDS | m_GRANITERAPIDS_D \
- | m_DIAMONDRAPIDS)
+ | m_DIAMONDRAPIDS | m_CORALRAPIDS)
#define m_CORE_AVX2 (m_HASWELL | m_SKYLAKE | m_CORE_AVX512)
#define m_CORE_ALL (m_CORE2 | m_NEHALEM | m_SANDYBRIDGE | m_CORE_AVX2)
#define m_CORE_HYBRID (m_ALDERLAKE | m_ARROWLAKE | m_ARROWLAKE_S \
@@ -809,6 +810,7 @@ static const struct processor_costs *processor_cost_table[]
=
&alderlake_cost, /* PROCESSOR_PANTHERLAKE. */
&icelake_cost, /* PROCESSOR_DIAMONDRAPIDS. */
&alderlake_cost, /* PROCESSOR_NOVALAKE. */
+ &icelake_cost, /* PROCESSOR_CORALRAPIDS. */
&alderlake_cost, /* PROCESSOR_INTEL. */
&lujiazui_cost, /* PROCESSOR_LUJIAZUI. */
&yongfeng_cost, /* PROCESSOR_YONGFENG. */
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 07f585b9b9e..240de2c1582 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -2384,6 +2384,7 @@ enum processor_type
PROCESSOR_PANTHERLAKE,
PROCESSOR_DIAMONDRAPIDS,
PROCESSOR_NOVALAKE,
+ PROCESSOR_CORALRAPIDS,
PROCESSOR_INTEL,
PROCESSOR_LUJIAZUI,
PROCESSOR_YONGFENG,
@@ -2525,6 +2526,8 @@ constexpr wide_int_bitmask PTA_NOVALAKE = PTA_PANTHERLAKE
| PTA_PREFETCHI
| PTA_AVX512VBMI | PTA_AVX512IFMA | PTA_AVX512VNNI | PTA_AVX512VBMI2
| PTA_AVX512BITALG | PTA_AVX512VPOPCNTDQ | PTA_AVX512FP16 | PTA_AVX512BF16
| PTA_AVX10_1 | PTA_AVX10_2 | PTA_APX_F | PTA_MOVRS | PTA_AVX10V1AUX;
+constexpr wide_int_bitmask PTA_CORALRAPIDS = PTA_DIAMONDRAPIDS
+ | PTA_AVX10VPMLDSABFLYDQ;
constexpr wide_int_bitmask PTA_BDVER1 = PTA_64BIT | PTA_MMX | PTA_SSE
| PTA_SSE2 | PTA_SSE3 | PTA_SSE4A | PTA_CX16 | PTA_POPCNT | PTA_LZCNT
diff --git a/gcc/config/i386/x86-tune-sched.cc
b/gcc/config/i386/x86-tune-sched.cc
index de9865cdae8..1f563fd8b9d 100644
--- a/gcc/config/i386/x86-tune-sched.cc
+++ b/gcc/config/i386/x86-tune-sched.cc
@@ -113,6 +113,7 @@ ix86_issue_rate (void)
case PROCESSOR_ARROWLAKE:
case PROCESSOR_ARROWLAKE_S:
case PROCESSOR_PANTHERLAKE:
+ case PROCESSOR_CORALRAPIDS:
return 6;
case PROCESSOR_NOVALAKE:
diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def
index 11617220282..62a02065c0a 100644
--- a/gcc/config/i386/x86-tune.def
+++ b/gcc/config/i386/x86-tune.def
@@ -593,7 +593,8 @@ DEF_TUNE (X86_TUNE_AVOID_128FMA_CHAINS, "avoid_fma_chains",
m_ZNVER
DEF_TUNE (X86_TUNE_AVOID_256FMA_CHAINS, "avoid_fma256_chains",
m_ZNVER2 | m_ZNVER3 | m_ZNVER4 | m_ZNVER5 | m_ZNVER6 | m_CORE_HYBRID
| m_SAPPHIRERAPIDS | m_GRANITERAPIDS | m_GRANITERAPIDS_D
- | m_DIAMONDRAPIDS | m_CORE_ATOM | m_GENERIC | m_C86_4G)
+ | m_DIAMONDRAPIDS | m_CORALRAPIDS | m_CORE_ATOM | m_GENERIC
+ | m_C86_4G)
/* X86_TUNE_AVOID_512FMA_CHAINS: Avoid creating loops with tight 512bit or
smaller FMA chain. */
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index b7dfea3a14c..7f7ec42f51a 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -29651,6 +29651,9 @@ Intel Core i7 Diamond Rapids CPU.
@item novalake
Intel Core i7 Nova Lake CPU.
+@item coralrapids
+Intel Core i7 Coral Rapids CPU.
+
@item bonnell
Intel Atom Bonnell CPU.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 44f469caf8b..268038dc5b8 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -35488,6 +35488,19 @@ PREFETCHI, AMX-COMPLEX, AVX10.1-512, AVX-IFMA,
AVX-NE-CONVERT, AVX-VNNI-INT16,
AVX-VNNI-INT8, CMPccXADD, SHA512, SM3, SM4, AVX10.2-512, APX_F, AMX-AVX512,
AMX-FP8, MOVRS and AMX-MOVRS instruction set support.
+@item coralrapids
+Intel Coral Rapids CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
+SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE,
+RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW,
+AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ,
+AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES,
AVX512VBMI2,
+VPCLMULQDQ, AVX512BITALG, RDPID, AVX512VPOPCNTDQ, PCONFIG, WBNOINVD, CLWB,
+MOVDIRI, MOVDIR64B, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, TSXLDTRK,
+UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16, AVX512BF16,
AMX-FP16,
+PREFETCHI, AMX-COMPLEX, AVX10.1, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT16,
+AVX-VNNI-INT8, CMPccXADD, SHA512, SM3, SM4, AVX10.2, APX_F, AMX-AVX512,
AMX-FP8,
+AMX-TF32, MOVRS, AMX-MOVRS, AVX10_VPMLDSABFLYDQ instruction set support.
+
@item bonnell
@itemx atom
Intel Bonnell CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3
diff --git a/gcc/testsuite/g++.target/i386/mv16.C
b/gcc/testsuite/g++.target/i386/mv16.C
index 87126a058db..944b6703c4f 100644
--- a/gcc/testsuite/g++.target/i386/mv16.C
+++ b/gcc/testsuite/g++.target/i386/mv16.C
@@ -132,6 +132,10 @@ int __attribute__ ((target("arch=novalake"))) foo () {
return 34;
}
+int __attribute__ ((target("arch=coralrapids"))) foo () {
+ return 35;
+}
+
int main ()
{
int val = foo ();
@@ -190,6 +194,8 @@ int main ()
assert (val == 33);
else if (__builtin_cpu_is ("novalake"))
assert (val == 34);
+ else if (__builtin_cpu_is ("coralrapids"))
+ assert (val == 35);
else
assert (val == 0);
diff --git a/gcc/testsuite/gcc.target/i386/funcspec-56.inc
b/gcc/testsuite/gcc.target/i386/funcspec-56.inc
index 4f4fde0ed66..03221fedbd2 100644
--- a/gcc/testsuite/gcc.target/i386/funcspec-56.inc
+++ b/gcc/testsuite/gcc.target/i386/funcspec-56.inc
@@ -236,6 +236,7 @@ extern void test_arch_arrowlake_s (void)
__attribute__((__target__("arch=arrowla
extern void test_arch_pantherlake (void)
__attribute__((__target__("arch=pantherlake")));
extern void test_arch_diamondrapids (void)
__attribute__((__target__("arch=diamondrapids")));
extern void test_arch_novalake (void)
__attribute__((__target__("arch=novalake")));
+extern void test_arch_coralrapids (void)
__attribute__((__target__("arch=coralrapids")));
extern void test_arch_lujiazui (void)
__attribute__((__target__("arch=lujiazui")));
extern void test_arch_yongfeng (void)
__attribute__((__target__("arch=yongfeng")));
extern void test_arch_shijidadao (void)
__attribute__((__target__("arch=shijidadao")));
--
2.31.1
