Hello,
While working on this I found the following code.
"output_move_double (rtx *operands, bool emit, int *count)
{
enum rtx_code code0 = GET_CODE (operands[0]);
enum rtx_code code1 = GET_CODE (operands[1]);
rtx otherops[3];
if (count)
*count = 1;
/* The only case when this might happen is when
you are looking at the length of a DImode instruction
that has an invalid constant in it. */
if (code0 == REG && code1 != MEM)
{
gcc_assert (!emit);
*count = 2; <----
return "";
}
"
the second dereference of count is not guarded with a NULL check.
Also, I have the peephole2 for post increment of double word load (ARM Cortex)
instruction's code ready.
I prefer to submit patches one at a time.
Will you please share the process of preparing a GCC patch?
Thanks,
Visda
________________________________
From: Visda Vokhshoori - C51841
Sent: Wednesday, September 17, 2025 4:59 PM
To: GCC Development <[email protected]>
Subject: [ARM] LDRD/STRD with write back
Hello,
These comments are in ldrdstrd.md file.
;; TODO: Handle LDRD/STRD with writeback:
;; (a) memory operands can be POST_INC, POST_DEC, PRE_MODIFY, POST_MODIFY
;; (b) Patterns may be followed by an update of the base address.
Please let me know if you have LDRD/STRD with memory write back on a local
branch.
I am interested in working on it, if no one has done so already. Please let me
know.
Regards,
Visda
