Hi! On Mon, Jan 22, 2018 at 10:57:35AM +0100, Martin Jambor wrote: > On Fri, Jan 19 2018, Sandra Loosemore wrote: > > On 01/19/2018 10:14 AM, Jeff Law wrote: > > > >> cc0 needs to die. That doesn't mean that any particular target needs to > >> be dropped -- it just means that someone has to step forward to do the > >> conversion. > > > > Unifying two parallel threads: might this be a good project for GSoC? > > I have no idea how big the task would be but it seems it could be quite > difficult. Therefore we would need an experienced and extraordinarily > willing to help mentor.
Firstly, you need to know RTL quite well. Secondly, you need to know the target architecture really well. And then, you "simply" need to find all places in the backend that generate insns affecting the condition flags, and change those as needed. (And that is *not* just patterns in the .md files, in the unlucky cases; you need to go over it *all*). For quite a long time you cannot actually run any code to test, either, so you'll have to stare at assembler code instead. It's a bit like writing a new backend, except you have all this existing code to worry about as well. Unless you start from scratch (which may not be such a bad idea: you get to modernise it all, and it isn't _really_ from scratch, you can peek at the old code and copy stuff from it). But writing a backend is too much for a GSoC, even a small one. Segher
