Hi everyone, Thanks Bert and Peter, first of all, for mentioning my program. I just wanted to let people know that I've actually updated the program so that it is now able to create a hierarchical symbol from a multiple-page schematic. Also, users no longer need to disable the hierarchical mode in order to use it. I have, however, delayed the release of the update because I've been working on the example to show the process of schematic capture all the way to displaying the verilog simulation with GTKWave. It'll be out soon though.
Respectfully, Andrew Tan ----- Original Message ---- From: Peter TB Brett <[EMAIL PROTECTED]> To: gEDA developer mailing list <[email protected]> Sent: Thursday, April 3, 2008 12:58:24 AM Subject: Re: gEDA-dev: GSOC last minute proposal On Thursday 03 April 2008 05:27:57 Bert Timmerman wrote: > Have a look at: > > http://www.seul.org/pipermail/geda-dev/2007-September/003804.html > > by Andrew Tan, for a starting point. > And: http://tinyurl.com/38wy9a Cheers, Peter -- Peter Brett Electronic Systems Engineer Integral Informatics Ltd ____________________________________________________________________________________ You rock. That's why Blockbuster's offering you one month of Blockbuster Total Access, No Cost. http://tc.deals.yahoo.com/tc/blockbuster/text5.com
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