The pcb netlist format supports tagging nets with a route style. The exporter doesn't support it. Can it? Do we have a way of tagging nets with additional attributes? Bonus: can we use those tags to adjust the thickness of the drawn line for them, allowing some visual indication of, say, power vs signal lines? Like, in data sheets for switching regulators, the high-current traces are bold and the low-current ones are thinner.
Anyway, the PCB netlist format is: netname -style pin pin pin pin pin We omit the -style part at the moment, it's optional. _______________________________________________ geda-dev mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-dev
