Hi Steve,
IMHO the gschem symbol mechanism lacks a few features.
A couple of them are listed in your mail below, and some are even more
fundamental as I see them.
For instance:
[Fundamental] A lot of [CMOS, TTL] components are available in SMD and in
through-hole packages --> their pin nummbering is not allways identical.
It's not practical to have two or more sets of symbols. This should be
solved at the attribute level (pins) if possible, for their graphical
representation is identical.
[Fundamental] The visible name of the package should be implemented as an
attribute, that is [7400, 74S00, 74LS00, ...].
As you mention, features like "Pb Free" could be implemented as an
attribute, and checked upon by some Design Rule Checking mechanism (DRC).
The maximum soldering temperature could be implemented as an attribute as
well. If critical, checking with a DRC mechanism applies here as well.
gattrib could be usefull for adding attribute values with a spreadsheet
application (copy-and-paste).
Landpatterns (AKA the footprint attribute) is also a matter of adding values
to the attributes of the symbols.
As you mention, there happens to be a IPC standard for Most, Lean or Normal
landpattern naming conventions. Let's start using this, or any other
standard that matches, in gschem __and__ in pcb (footprint library).
What is also needed is a set of DRC mechanisms to check if all the attribute
values match with the objectives for the pcb; Pb free, SMD/Through hole
technology/both, Most/Lean/Normal landpattern, and so on.
A set of DRC mechanisms ("gDRC") should give warnings if any of the
attributes in the gschem schematic doesn't meet the objectives, before one
starts to route the final pcb.
A DRC mechanism can only work, or be automated (the A as in gEDA), if the
above mentioned standards are used consistently.
As I see the resulting design work flow:
gschem --> gattrib --> "gDRC" --> gnetlist --> gschem2pcb --> pcb --> gerbv
--> boardhouse --> soldering process --> functional testing of the
prototype.
Note: for every "-->" one should perform a check (as in ISO9000 Quality
Control Management and stuff), i.e. ask oneself "is this design meeting the
design specification of the product ?".
Just my EUR 0.01
Greetings,
Bert Timmerman.
-----Original Message-----
From: Stephen Meier [mailto:[EMAIL PROTECTED]
Sent: zondag 31 oktober 2004 12:55
To: [EMAIL PROTECTED]
Subject: gEDA: Component Packages and PCB Land Pattern - naming
Conventions
Here is my take on the subject.
1. Components --- devices that are often (usually packaged) have
charateristics that should not be ignored at the schemtic design level.
Issues:
Device susceptibility to soldering temperature.
Is the device Pb free?
Does the device package match the thermal characteristics of the fab
plastic?
For information about the device package we look to the JEDEC standard JEP95
But JEP95 has package families that are physically similar but made from
different materials. For example Plastic Leadless Chip Carrier (PLCC)
(JEP95 MO-047) and a Ceramic Leadless Chip Carrier (LCC) (JEP95 MO-044).
Both include 0.050" pitch 68 pin leadless devices that would fit the
same land pattern.
2. Land patterns are also dependent on the assembly solder method (wave
solder, solder bath, reflow oven). IPC-SM-782-A "Surface Mount Design
and Land Pattern Standard" includes a note in section 8.1 that states
"If a more robust pattern is desired for wave soldering devices larger
than 1608 [603], add 0.2mm to the Y direction and consider reducing the
X dimension by 30%. Add a "W" sufix to the number e.g. 103W".
The number is the Registered Land Pattern Number of which a 103A pattern
is the normal pattern for a 3216 [1206] chip resistor.
Proposal:
Symbols for gschem should not include the land pattern they should
include the package identifier. The package identifier should be from
the JEP95 or other consortium (European or Japanes) which ever is
relevent for the device. I would also like to see the gschem symbols
contain information about Pb content. Gschem should also have a way of
showing the user what the package is and if it contains Pb in the
preview mode while selecting devices from the library.
The netlist generator should translate the package identifier to a land
pattern identifier based upon the assembly soldering method (normally
reflow for surface mount). The land pattern identifier should be from a
standard such as IPC-SM-782-A.
Steve Meier
