Jeff Trull wrote: > If by "fancy" you mean "containing arcs", it's quite a few - or/nor,xor/xnor, > and all the ao/oa combinations with their different sizes.
Oh, yes. It's been awhile since I've dealt with ASIC cells. One forgets 5 input NORs exist as design elements when making boards... So you want all the NOR and NAND gate symbols we are used to for making schematics. Once your customer has gschem schematics, will they keep those as their top level docs, or pipe it back into Cadence/Synopsys somehow for "pre tapeout" double checking, LVS, timing, test program writing? John Griessen _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
