There will likely be some coding in the vendor's language (Skill or possibly Tcl), for "property" information (net routing constraints, instance pre-placement) but I expect netlists to move as Verilog. I should be able to avoid EDIF.
On Wednesday 13 June 2007 12:25:39 John Griessen wrote: > Jeff Trull wrote: > > On Tuesday 12 June 2007 15:24:11 John Griessen wrote: > >> Once your customer has gschem schematics, will they keep those as their > >> top level docs? > > > > They serve a few different purposes: > > > > 1) timing prototyping/simulation > > 2) documentation > > 3) design entry > > > > For the last one, the schematics are intended to become modules within a > > major EDA vendor's flow, so part of my job is to figure out how to > > cleanly merge them in with blocks that are synthesized. > > Errgh... You could get stuck importing as EDIF again! What are you > thinking of? Custom Skill code? > > John Griessen > Long ex Skill coder... > > > _______________________________________________ > geda-user mailing list > [email protected] > http://www.seul.org/cgi-bin/mailman/listinfo/geda-user _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
