On Jan 20, 2008 4:36 PM, al davis <[EMAIL PROTECTED]> wrote: > > > In my flow, I usually prepare a testbench file manually and > > from here I include a (clean, without simulation commands) > > netlist. However, that ".END" makes this flow awkward. Sure, > > I can do it the other way around or postprocess the netlist > > but it's an additional hassle. > > I usually need to edit the generated netlist. If not this, it > is something else. I also usually need to do the schematic in > a way a little different than I want, to make the netlister > happy.
Editing netlists is "evil". I really want to have all design data on schematics. Postprocessing the netlist is error prone and you may easily end up simulating different circuit than you entered in your schematic editor. Sure, it's not a problem with simple designs but in real life you rarely go below several tens of hierarchically arranged cells. > The other netlisters have problems too .. The Verilog netlister > does not pass attributes. The VHDL netlister gets the pin > names wrong. I have just tried the spice netlister with a trivial hierarchical design (a circuit that contains subcircuit that contains a MOS transistor). This was just before Stuart sent his mail. Here is what I got: * gnetlist -I -g spice-sdb -o top.net lib3/top.sch ********************************************************* * Spice file generated by gnetlist * * spice-sdb version 4.28.2007 by SDB -- * * provides advanced spice netlisting capability. * * Documentation at http://www.brorson.com/gEDA/SPICE/ * ********************************************************* *============== Begin SPICE netlist of main design ============ M1/M1 1 3 2 2 nmos4 l=3u w=1u S 2 <No valid value attribute found> G 3 <No valid value attribute found> D 1 unknown .end I wouldn't even know where to start I wanted to fix it. It simply looks totally wrong. Flattened (?) subcircuits, lost net names, some garbage. The ".end" clause seems to be the least issue here. Sorry if that sounds like bashing again. There is quite impressive amount of code in both gnetlist and its backends. But something went wrong with them. I just can't help the feeling that it woudn't take more than 2 days hacking to write a perl script generating a valid spice netlist. -r. _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
