> I have just tried the spice netlister with a trivial hierarchical > design (a circuit that contains subcircuit that contains a MOS > transistor). This was just before Stuart sent his mail.
I'd be curious to see what happens if you try some of the suggestions in my e-mail. In particular, using Makefiles to manage large projects -- rather than some built-in facilities of the EDA program itself -- is one of the strengths of the gEDA approach, once you get used to it. Yes, I realize that many folks want the tool to do everything, but that's not how gEDA currently works. Rather, we try to exploit gEDA's openness, and leverage other unix tools to help create designs. We try to follow the unix philosophy of having small tools which do one thing well, and then use scripts and other glue to build larger workflows. It's not what some people expect nowadays, since they've become used to the Windows application "everything *and* the kitchen sink" philosophy. > HERE is what I > got: > > * gnetlist -I -g spice-sdb -o top.net lib3/top.sch > ********************************************************* > * Spice file generated by gnetlist * > * spice-sdb version 4.28.2007 by SDB -- * > * provides advanced spice netlisting capability. * > * Documentation at http://www.brorson.com/gEDA/SPICE/ * > ********************************************************* > *============== Begin SPICE netlist of main design ============ > M1/M1 1 3 2 2 nmos4 l=3u w=1u > S 2 <No valid value attribute found> > G 3 <No valid value attribute found> > D 1 unknown > .end Hmmmm..... It would be interesting to see the schematic which produced this netlist. Stuart _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
