On Fri, Apr 25, 2008 at 10:24 AM, Ian Chapman <[EMAIL PROTECTED]> wrote: > > * Try turning of the pads and see if there is a small amount amount of > copper under the pad. > * Are your traces and pads on the same side of the board? > * Can you connect with with "auto enforce DRC clearance" off? > > Hi John, > The last suggestion enabled me to connect to the pad. I guess that > there is something wrong with my footprint. Also that PCB is not happy with > some of the high density SMT legacy footprints without clearance and mask. > I am concerned that no DRC will get me into other difficulties.
I agree. The last suggestion was meant as a test. What are your design rules set to? > > I'll try your SQFP-50P-1680L1-1680L2-100N footprint tonight. > Looking at the pad definition you have > Pad[-32479 -23616 -27412 -23616 1181 2000 3181 "" "1" 0x0100] > > Thickness 1181 > Clearance 2000 = 0.01" > Mask 3181 The majority of my footprints will have 10mils of clearance for copper and 10mils of clearance for soldermask ((3181-1181)/2 = 10mils). (* jcl *) -- http://www.luciani.org _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
