Am 31.12.2010 16:31, schrieb Stephan Boettcher: > > Maybe your time is better invested by using a small FPGA for whatever > you want to build, and learn Verilog to express the logic. > > Depends how much fun can have from learning such stuff. A deadline does > not seem to be your problem. > > (It should be possible to draw a gschem schematic, export a verilog > netlist and upload that to the FPGA too, for parts of the circuit you > feel more comfortable, but then you'd need to do both, symbols and > Verilog :-) >
Well, sometimes you just need a few gates somewhere, e.g. one of my boards contains just a 74LS21, a capacitor and an EPROM. Using a FPGA or even a CPLD would be overkill. While I prefer the "US" symbols even though I grew up in germany; I know people that prefer other symbol styles, and if they were there for those that want to use them. Philipp _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
