cool stuff. I'll be checking it out tonight. One thing I've been wondering about is how one might have some hooks for a technology file if you wanted to use gEDA for IC type schematics. Where you care about this is the following:
You're doing a MOS transistor design. For a given technology, you can calculate the AS, AD, PS, PD parameters (source and drain areas and perimeters) from the specified width, length, and number of fingers for the device. The commercial tools all provide hooks so that the tool will properly fill in those parameters in your netlist based on some equations that include process dependent parameters. I've been wondering what it would take to get such a hook into gEDA. It seems like a good way might be to have a line in the gnetlistrc file for the project that specified a particular technology library. Then you'd just want to figure out how to have the netlister provide some sort of hook where you could insert whatever extra equations you may need. Anyway, I'll be anxious to see what you've done with the spice netlister. I've been thinking of doing a switcap backend so I imagine there may be something for me to learn from your work. -Dan On Sat, 22 Mar 2003, Stuart Brorson wrote: > Greetings gEDA gurus, > > I've been hacking on my SPICE netlister more, and now have > incorporated the ability to use .SUBCKT model files into the > netlister, as well as improved things in other ways. I have posted my > stuff on my "SPICE on gEDA" web page: > > http://www.brorson.com/gEDA/SPICE/ > > There, you will find the following: > > * Updated SPICE on gEDA HOWTO > * gnet-spice-SDB.scm -- the new and improved Scheme back end > * Some spice models from LT and Analog Devices > * Two projects which I have built and simulated using LTSpice > * Other good stuff > > If you are interested in using gEDA schematic capture & netlisting > tools as a SPICE front end you may be interested in checking it out. > > Comments and suggestins are welcome! > > Stuart >
