changeset 715806745e00 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=715806745e00
description:
inorder: handle faults at writeback stage
call trap function when a fault is received
diffstat:
src/cpu/inorder/cpu.cc | 1 +
src/cpu/inorder/resources/decode_unit.cc | 4 ++--
src/cpu/inorder/resources/execution_unit.cc | 5 +++--
src/cpu/inorder/resources/graduation_unit.cc | 6 ++----
src/cpu/inorder/resources/use_def.cc | 4 ++--
5 files changed, 10 insertions(+), 10 deletions(-)
diffs (76 lines):
diff -r 67081684c03e -r 715806745e00 src/cpu/inorder/cpu.cc
--- a/src/cpu/inorder/cpu.cc Sun Jun 19 21:43:34 2011 -0400
+++ b/src/cpu/inorder/cpu.cc Sun Jun 19 21:43:34 2011 -0400
@@ -141,6 +141,7 @@
break;
case Trap:
+ DPRINTF(InOrderCPU, "Trapping CPU\n");
cpu->trapCPU(fault, tid, inst);
break;
diff -r 67081684c03e -r 715806745e00 src/cpu/inorder/resources/decode_unit.cc
--- a/src/cpu/inorder/resources/decode_unit.cc Sun Jun 19 21:43:34 2011 -0400
+++ b/src/cpu/inorder/resources/decode_unit.cc Sun Jun 19 21:43:34 2011 -0400
@@ -64,8 +64,8 @@
if (inst->backSked != NULL) {
DPRINTF(InOrderDecode,
- "[tid:%i]: Setting Destination Register(s) for [sn:%i].\n",
- tid, inst->seqNum);
+ "[tid:%i]: %s Setting Destination Register(s) for
[sn:%i].\n",
+ tid, inst->instName(), inst->seqNum);
regDepMap[tid]->insert(inst);
//inst->printSked();
diff -r 67081684c03e -r 715806745e00 src/cpu/inorder/resources/execution_unit.cc
--- a/src/cpu/inorder/resources/execution_unit.cc Sun Jun 19 21:43:34
2011 -0400
+++ b/src/cpu/inorder/resources/execution_unit.cc Sun Jun 19 21:43:34
2011 -0400
@@ -249,8 +249,9 @@
exec_req->done();
} else {
- warn("inst [sn:%i] had a %s fault",
- seq_num, fault->name());
+ warn("inst [sn:%i] had a %s fault", seq_num,
fault->name());
+
+ exec_req->done();
}
} else {
// Regular ALU instruction
diff -r 67081684c03e -r 715806745e00
src/cpu/inorder/resources/graduation_unit.cc
--- a/src/cpu/inorder/resources/graduation_unit.cc Sun Jun 19 21:43:34
2011 -0400
+++ b/src/cpu/inorder/resources/graduation_unit.cc Sun Jun 19 21:43:34
2011 -0400
@@ -68,13 +68,11 @@
// Handle Any Faults Before Graduating Instruction
if (inst->fault != NoFault) {
cpu->trap(inst->fault, tid, inst);
- grad_req->setCompleted(false);
- return;
}
DPRINTF(InOrderGraduation,
- "[tid:%i] Graduating instruction [sn:%i].\n",
- tid, inst->seqNum);
+ "[tid:%i] Graduating instruction %s [sn:%i].\n",
+ tid, inst->instName(), inst->seqNum);
// Release Non-Speculative "Block" on instructions that could not
// execute because there was a non-speculative inst. active.
diff -r 67081684c03e -r 715806745e00 src/cpu/inorder/resources/use_def.cc
--- a/src/cpu/inorder/resources/use_def.cc Sun Jun 19 21:43:34 2011 -0400
+++ b/src/cpu/inorder/resources/use_def.cc Sun Jun 19 21:43:34 2011 -0400
@@ -148,11 +148,11 @@
// If there is a non-speculative instruction
// in the pipeline then stall instructions here
- if (*nonSpecInstActive[tid] == true &&
- seq_num > *nonSpecSeqNum[tid]) {
+ if (*nonSpecInstActive[tid] == true && seq_num > *nonSpecSeqNum[tid]) {
DPRINTF(InOrderUseDef, "[tid:%i]: [sn:%i] cannot execute because"
"there is non-speculative instruction [sn:%i] has not "
"graduated.\n", tid, seq_num, *nonSpecSeqNum[tid]);
+ ud_req->done(false);
return;
} else if (inst->isNonSpeculative()) {
*nonSpecInstActive[tid] = true;
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev
