[gem5-dev] changeset in gem5: inorder: find register dependencies "lazily"

[Korey Sewell]

changeset e506f0b8ca51 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=e506f0b8ca51
description:
        inorder: find register dependencies "lazily"
        Architectures like SPARC need to read the window pointer
        in order to figure out it's register dependence. However,
        this may not get updated until after an instruction gets
        executed, so now we lazily detect the register dependence
        in the EXE stage (execution unit or use_def). This
        makes sure we get the mapping after the most current change.

diffstat:

 src/cpu/inorder/resources/decode_unit.cc    |   1 -
 src/cpu/inorder/resources/execution_unit.cc |  13 +++++++++++--
 src/cpu/inorder/resources/use_def.cc        |   6 ++++++
 3 files changed, 17 insertions(+), 3 deletions(-)

diffs (60 lines):

diff -r fc44dde6bbc9 -r e506f0b8ca51 src/cpu/inorder/resources/decode_unit.cc
--- a/src/cpu/inorder/resources/decode_unit.cc  Sun Jun 19 21:43:34 2011 -0400
+++ b/src/cpu/inorder/resources/decode_unit.cc  Sun Jun 19 21:43:34 2011 -0400
@@ -68,7 +68,6 @@
                 DPRINTF(InOrderDecode,
                     "[tid:%i]: %s Setting Destination Register(s) for 
[sn:%i].\n",
                         tid, inst->instName(), inst->seqNum);
-                regDepMap[tid]->insert(inst);
 
                 //inst->printSked();
 
diff -r fc44dde6bbc9 -r e506f0b8ca51 src/cpu/inorder/resources/execution_unit.cc
--- a/src/cpu/inorder/resources/execution_unit.cc       Sun Jun 19 21:43:34 
2011 -0400
+++ b/src/cpu/inorder/resources/execution_unit.cc       Sun Jun 19 21:43:34 
2011 -0400
@@ -100,6 +100,17 @@
     }
 
 
+    //@todo: may want to make a separate schedule entry for setting
+    //       destination register dependencies
+    //@note: typically want to set the output dependencies right
+    //       before we do any reading or writing of registers
+    //       (in RegFile Manager(use_def.cc)) but there are some
+    //       instructions that dont have src regs, so just in case
+    //       take care of reg. dep. map stuff here
+    if (!inst->isRegDepEntry()) {
+        regDepMap[tid]->insert(inst);
+    }
+
     switch (exec_req->cmd)
     {
       case ExecuteInst:
@@ -139,11 +150,9 @@
                 lastControlTick = curTick();
 
                 // Evaluate Branch
-                DPRINTF(IEW, "Pre-Execute %s PC:%s nextPC:%s predPC:%s\n", 
inst->instName(), inst->pcState(), inst->readPredTarg());
                 fault = inst->execute();
                 executions++;
                 inst->setExecuted();
-                DPRINTF(IEW, "Post-Execute %s PC:%s nextPC:%s predPC:%s\n", 
inst->instName(), inst->pcState(), inst->readPredTarg());
 
                 if (fault == NoFault) {
                     // If branch is mispredicted, then signal squash
diff -r fc44dde6bbc9 -r e506f0b8ca51 src/cpu/inorder/resources/use_def.cc
--- a/src/cpu/inorder/resources/use_def.cc      Sun Jun 19 21:43:34 2011 -0400
+++ b/src/cpu/inorder/resources/use_def.cc      Sun Jun 19 21:43:34 2011 -0400
@@ -159,6 +159,12 @@
         *nonSpecSeqNum[tid] = seq_num;
     }
 
+    //@todo: may want to make a separate schedule entry for setting
+    //       destination register dependencies
+    if (!inst->isRegDepEntry()) {
+        regDepMap[tid]->insert(inst);
+    }
+
     switch (ud_req->cmd)
     {
       case ReadSrcReg:
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