changeset 8a4747be8490 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=8a4747be8490
description:
inorder: scheduling for nonspec insts
make handling of speculative and nonspeculative insts
more explicit
diffstat:
src/cpu/inorder/cpu.cc | 64 ++++++++++++++++++++++++++++++++-----------------
1 files changed, 41 insertions(+), 23 deletions(-)
diffs (84 lines):
diff -r e506f0b8ca51 -r 8a4747be8490 src/cpu/inorder/cpu.cc
--- a/src/cpu/inorder/cpu.cc Sun Jun 19 21:43:34 2011 -0400
+++ b/src/cpu/inorder/cpu.cc Sun Jun 19 21:43:34 2011 -0400
@@ -425,6 +425,8 @@
}
}
+ //@todo: schedule non-spec insts to operate on this cycle
+ // as long as all previous insts are done
if ( inst->isNonSpeculative() ) {
// skip execution of non speculative insts until later
} else if ( inst->isMemRef() ) {
@@ -437,32 +439,48 @@
X.needs(ExecUnit, ExecutionUnit::ExecuteInst);
}
- if (inst->opClass() == IntMultOp || inst->opClass() == IntDivOp) {
- X.needs(MDU, MultDivUnit::EndMultDiv);
+ // MEMORY
+ if (!inst->isNonSpeculative()) {
+ if (inst->opClass() == IntMultOp || inst->opClass() == IntDivOp) {
+ M.needs(MDU, MultDivUnit::EndMultDiv);
+ }
+
+ if ( inst->isLoad() ) {
+ M.needs(DCache, CacheUnit::InitiateReadData);
+ } else if ( inst->isStore() ) {
+ if ( inst->numSrcRegs() >= 2 ) {
+ M.needs(RegManager, UseDefUnit::ReadSrcReg, 1);
+ }
+ M.needs(AGEN, AGENUnit::GenerateAddr);
+ M.needs(DCache, CacheUnit::InitiateWriteData);
+ }
}
- // MEMORY
- if ( inst->isLoad() ) {
- M.needs(DCache, CacheUnit::InitiateReadData);
- } else if ( inst->isStore() ) {
- if ( inst->numSrcRegs() >= 2 ) {
- M.needs(RegManager, UseDefUnit::ReadSrcReg, 1);
+ // WRITEBACK
+ if (!inst->isNonSpeculative()) {
+ if ( inst->isLoad() ) {
+ W.needs(DCache, CacheUnit::CompleteReadData);
+ } else if ( inst->isStore() ) {
+ W.needs(DCache, CacheUnit::CompleteWriteData);
}
- M.needs(AGEN, AGENUnit::GenerateAddr);
- M.needs(DCache, CacheUnit::InitiateWriteData);
- }
-
-
- // WRITEBACK
- if ( inst->isLoad() ) {
- W.needs(DCache, CacheUnit::CompleteReadData);
- } else if ( inst->isStore() ) {
- W.needs(DCache, CacheUnit::CompleteWriteData);
- }
-
- if ( inst->isNonSpeculative() ) {
- if ( inst->isMemRef() ) fatal("Non-Speculative Memory Instruction");
- W.needs(ExecUnit, ExecutionUnit::ExecuteInst);
+ } else {
+ // Finally, Execute Speculative Data
+ if (inst->isMemRef()) {
+ if (inst->isLoad()) {
+ W.needs(AGEN, AGENUnit::GenerateAddr);
+ W.needs(DCache, CacheUnit::InitiateReadData);
+ W.needs(DCache, CacheUnit::CompleteReadData);
+ } else if (inst->isStore()) {
+ if ( inst->numSrcRegs() >= 2 ) {
+ W.needs(RegManager, UseDefUnit::ReadSrcReg, 1);
+ }
+ W.needs(AGEN, AGENUnit::GenerateAddr);
+ W.needs(DCache, CacheUnit::InitiateWriteData);
+ W.needs(DCache, CacheUnit::CompleteWriteData);
+ }
+ } else {
+ W.needs(ExecUnit, ExecutionUnit::ExecuteInst);
+ }
}
W.needs(Grad, GraduationUnit::GraduateInst);
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