> On 2011-06-22 09:24:30, Korey Sewell wrote: > > src/arch/mips/isa/formats/branch.isa, line 237 > > <http://reviews.m5sim.org/r/748/diff/4/?file=13066#file13066line237> > > > > The last thing to do is pass the regressions. > > > > Can you run the ALPHA quick regressions for inorder and also the MIPS > > quick regression and verify they pass? > > > > Is there a dhrystone benchmark that exposes this branch likely > > functionality? It'd be nice to make sure we check that this does not get > > broken on future regression runs.
Hello! I just tested the following commands with the latest version: build/ALPHA_SE/m5.opt configs/example/se.py --inorder --caches build/MIPS_SE/m5.opt configs/example/se.py --inorder --caches The helloworld tests of ALPHA and MIPS32 can run correctly. However, I don't know the meaning of "run the ALPHA quick regressions". Does it relate to the tests/quick folder? Could you tell me how to use this? At last, I find that the branch likely instructions aren't generated by our MIPS compiler. These instructions are in our MIPS64 glibc libraries. So I think using an inline assembly testcase containing those instructions may be more efficiently than using the dhrystone benchmark or other C benchmarks. - Deyuan ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/748/#review1359 ----------------------------------------------------------- On 2011-06-21 18:39:11, Deyuan Guo wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/748/ > ----------------------------------------------------------- > > (Updated 2011-06-21 18:39:11) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and > Nathan Binkert. > > > Summary > ------- > > Make the newly gem5 support mips branch likely instruction again. > Fix 4 files: > src/arch/mips/isa/formats/branch.isa > src/cpu/inorder/inorder_dyn_inst.cc > src/cpu/inorder/resources/branch_predictor.cc > src/cpu/inorder/resources/fetch_seq_unit.cc > > > Diffs > ----- > > src/arch/mips/isa/formats/branch.isa 00766f5b8177 > src/cpu/inorder/inorder_dyn_inst.cc 00766f5b8177 > src/cpu/inorder/resources/branch_predictor.cc 00766f5b8177 > src/cpu/inorder/resources/fetch_seq_unit.cc 00766f5b8177 > > Diff: http://reviews.m5sim.org/r/748/diff > > > Testing > ------- > > Tested. > > > Thanks, > > Deyuan > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
