> On 2011-07-01 11:29:38, Steve Reinhardt wrote:
> > src/arch/power/isa/decoder.isa, line 287
> > <http://reviews.m5sim.org/r/655/diff/3/?file=13121#file13121line287>
> >
> >     I'm still not super happy with these explicit casts... don't they go 
> > away when you finally get to supporting arbitrary types anyway?  Can we 
> > just flatten this series of changes to get rid of this interim step?

Oh, whoops. That was the point of all this commotion, wasn't it? It was late, 
and I must have just forgotten to take that out again. I'll take care of that 
tonight.


- Gabe


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On 2011-06-29 04:07:35, Gabe Black wrote:
> 
> -----------------------------------------------------------
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.m5sim.org/r/655/
> -----------------------------------------------------------
> 
> (Updated 2011-06-29 04:07:35)
> 
> 
> Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and 
> Nathan Binkert.
> 
> 
> Summary
> -------
> 
> ISA parser: Simplify operand type handling.
> 
> This change simplifies the code surrounding operand type handling and makes it
> depend only on the ctype that goes with each operand type. Future changes will
> allow defining operand types by their ctypes directly, convert the ISAs over
> to that style of definition, and then remove support for the old style. These
> changes are to make it easier to use non-builtin types like classes or
> structures as the type for operands.
> 
> 
> Diffs
> -----
> 
>   src/arch/arm/isa/insts/ldr.isa 4adb1148ef73 
>   src/arch/arm/isa/insts/mem.isa 4adb1148ef73 
>   src/arch/arm/isa/insts/str.isa 4adb1148ef73 
>   src/arch/isa_parser.py 4adb1148ef73 
>   src/arch/mips/isa/decoder.isa 4adb1148ef73 
>   src/arch/power/isa/decoder.isa 4adb1148ef73 
>   src/arch/power/isa/formats/mem.isa 4adb1148ef73 
>   src/arch/sparc/isa/decoder.isa 4adb1148ef73 
> 
> Diff: http://reviews.m5sim.org/r/655/diff
> 
> 
> Testing
> -------
> 
> 
> Thanks,
> 
> Gabe
> 
>

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