changeset 3c641509bf3e in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=3c641509bf3e
description:
O3: Get rid of the raw ExtMachInst constructor on DynInsts.
This constructor assumes that the ExtMachInst can be decoded directly
into a
StaticInst that's useful to execute. With the advent of microcoded
instructions that's no longer true.
diffstat:
src/cpu/base_dyn_inst.hh | 10 ----------
src/cpu/base_dyn_inst_impl.hh | 15 ---------------
src/cpu/o3/dyn_inst.hh | 5 -----
src/cpu/o3/dyn_inst_impl.hh | 9 ---------
src/cpu/ozone/dyn_inst_impl.hh | 8 --------
5 files changed, 0 insertions(+), 47 deletions(-)
diffs (97 lines):
diff -r b5052cad1fd3 -r 3c641509bf3e src/cpu/base_dyn_inst.hh
--- a/src/cpu/base_dyn_inst.hh Tue Aug 02 03:22:11 2011 -0700
+++ b/src/cpu/base_dyn_inst.hh Tue Aug 02 11:51:16 2011 -0700
@@ -380,16 +380,6 @@
BaseDynInst(StaticInstPtr staticInst, TheISA::PCState pc,
TheISA::PCState predPC, InstSeqNum seq_num, ImplCPU *cpu);
- /** BaseDynInst constructor given a binary instruction.
- * @param inst The binary instruction.
- * @param _pc The PC state for the instruction.
- * @param _predPC The predicted next PC state for the instruction.
- * @param seq_num The sequence number of the instruction.
- * @param cpu Pointer to the instruction's CPU.
- */
- BaseDynInst(TheISA::ExtMachInst inst, TheISA::PCState pc,
- TheISA::PCState predPC, InstSeqNum seq_num, ImplCPU *cpu);
-
/** BaseDynInst constructor given a StaticInst pointer.
* @param _staticInst The StaticInst for this BaseDynInst.
*/
diff -r b5052cad1fd3 -r 3c641509bf3e src/cpu/base_dyn_inst_impl.hh
--- a/src/cpu/base_dyn_inst_impl.hh Tue Aug 02 03:22:11 2011 -0700
+++ b/src/cpu/base_dyn_inst_impl.hh Tue Aug 02 11:51:16 2011 -0700
@@ -90,21 +90,6 @@
}
template <class Impl>
-BaseDynInst<Impl>::BaseDynInst(TheISA::ExtMachInst inst,
- TheISA::PCState _pc, TheISA::PCState _predPC,
- InstSeqNum seq_num, ImplCPU *cpu)
- : staticInst(inst, _pc.instAddr()), traceData(NULL), cpu(cpu)
-{
- seqNum = seq_num;
-
- pc = _pc;
- predPC = _predPC;
- predTaken = false;
-
- initVars();
-}
-
-template <class Impl>
BaseDynInst<Impl>::BaseDynInst(StaticInstPtr &_staticInst)
: staticInst(_staticInst), traceData(NULL)
{
diff -r b5052cad1fd3 -r 3c641509bf3e src/cpu/o3/dyn_inst.hh
--- a/src/cpu/o3/dyn_inst.hh Tue Aug 02 03:22:11 2011 -0700
+++ b/src/cpu/o3/dyn_inst.hh Tue Aug 02 11:51:16 2011 -0700
@@ -90,11 +90,6 @@
TheISA::PCState pc, TheISA::PCState predPC,
InstSeqNum seq_num, O3CPU *cpu);
- /** BaseDynInst constructor given a binary instruction. */
- BaseO3DynInst(ExtMachInst inst,
- TheISA::PCState pc, TheISA::PCState predPC,
- InstSeqNum seq_num, O3CPU *cpu);
-
/** BaseDynInst constructor given a static inst pointer. */
BaseO3DynInst(StaticInstPtr &_staticInst);
diff -r b5052cad1fd3 -r 3c641509bf3e src/cpu/o3/dyn_inst_impl.hh
--- a/src/cpu/o3/dyn_inst_impl.hh Tue Aug 02 03:22:11 2011 -0700
+++ b/src/cpu/o3/dyn_inst_impl.hh Tue Aug 02 11:51:16 2011 -0700
@@ -53,15 +53,6 @@
}
template <class Impl>
-BaseO3DynInst<Impl>::BaseO3DynInst(ExtMachInst inst,
- TheISA::PCState pc, TheISA::PCState predPC,
- InstSeqNum seq_num, O3CPU *cpu)
- : BaseDynInst<Impl>(inst, pc, predPC, seq_num, cpu)
-{
- initVars();
-}
-
-template <class Impl>
BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr &_staticInst)
: BaseDynInst<Impl>(_staticInst)
{
diff -r b5052cad1fd3 -r 3c641509bf3e src/cpu/ozone/dyn_inst_impl.hh
--- a/src/cpu/ozone/dyn_inst_impl.hh Tue Aug 02 03:22:11 2011 -0700
+++ b/src/cpu/ozone/dyn_inst_impl.hh Tue Aug 02 11:51:16 2011 -0700
@@ -47,14 +47,6 @@
}
template <class Impl>
-OzoneDynInst<Impl>::OzoneDynInst(ExtMachInst inst, Addr PC, Addr Pred_PC,
- InstSeqNum seq_num, OzoneCPU *cpu)
- : BaseDynInst<Impl>(inst, PC, Pred_PC, seq_num, cpu)
-{
- initInstPtrs();
-}
-
-template <class Impl>
OzoneDynInst<Impl>::OzoneDynInst(StaticInstPtr _staticInst)
: BaseDynInst<Impl>(_staticInst)
{
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