Hi Everyone,
I've run into yet another issue with an L2 prefetcher doing something weird. I'm hoping that someone (mostly Steve) could tell me what is supposed to happen in this case to fix it. Obligatory trace below: 496726046000: system.cpu.dcache: ReadReq 8cabe0 miss _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
