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I'm hugely supportive of this direction... in fact I have my own patch I was working on to allow devices in SE mode, though it is much more limited in scope. I think we may have different goals though. Is your purpose here just to get the devices to make it through the compiler and linker without complaints, as another step toward integrating SE and FS? It doesn't look like any of these devices would actually be usable in SE mode, so I assume that's your angle. In contrast, - Steve On 2011-09-26 02:21:44, Gabe Black wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/885/ > ----------------------------------------------------------- > > (Updated 2011-09-26 02:21:44) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and > Nathan Binkert. > > > Summary > ------- > > SE/FS: Build the devices in SE mode. > > > Diffs > ----- > > src/arch/sparc/isa_traits.hh cf26f9578cd0 > src/base/vnc/SConscript cf26f9578cd0 > src/cpu/SConscript cf26f9578cd0 > src/cpu/intr_control.cc cf26f9578cd0 > src/dev/SConscript cf26f9578cd0 > src/dev/alpha/AlphaBackdoor.py cf26f9578cd0 > src/dev/alpha/SConscript cf26f9578cd0 > src/dev/alpha/backdoor.hh cf26f9578cd0 > src/dev/alpha/backdoor.cc cf26f9578cd0 > src/dev/alpha/tsunami.cc cf26f9578cd0 > src/dev/arm/SConscript cf26f9578cd0 > src/dev/arm/gic.cc cf26f9578cd0 > src/dev/arm/realview.cc cf26f9578cd0 > src/dev/mips/SConscript cf26f9578cd0 > src/dev/mips/malta.cc cf26f9578cd0 > src/dev/mips/malta_cchip.cc cf26f9578cd0 > src/dev/mips/malta_io.cc cf26f9578cd0 > src/dev/mips/malta_pchip.cc cf26f9578cd0 > src/dev/simple_disk.cc cf26f9578cd0 > src/dev/sparc/SConscript cf26f9578cd0 > src/dev/sparc/iob.cc cf26f9578cd0 > src/dev/sparc/t1000.cc cf26f9578cd0 > src/dev/x86/SConscript cf26f9578cd0 > src/dev/x86/i82094aa.cc cf26f9578cd0 > src/dev/x86/pc.cc cf26f9578cd0 > > Diff: http://reviews.m5sim.org/r/885/diff > > > Testing > ------- > > > Thanks, > > Gabe > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
