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(Updated 2012-01-05 05:21:09.208991) Review request for Default. Summary ------- MEM: Separate queries for snooping and address ranges This patch simplifies the address-range determination mechanism and also unifies the naming across ports and devices. It further splits the queries for determining if a port is snooping and what address ranges it responds to (aiming towards a separation of cache-maintenance ports and pure memory-mapped ports). Default behaviours are such that most ports do not have to define isSnooping, and master ports need not implement getAddrRanges. Diffs (updated) ----- src/arch/x86/interrupts.hh 09b482ee9ae0 src/arch/x86/interrupts.cc 09b482ee9ae0 src/arch/x86/pagetable_walker.hh 09b482ee9ae0 src/arch/x86/pagetable_walker.cc 09b482ee9ae0 src/cpu/base.hh 09b482ee9ae0 src/cpu/base.cc 09b482ee9ae0 src/cpu/inorder/resources/cache_unit.hh 09b482ee9ae0 src/cpu/inorder/resources/cache_unit.cc 09b482ee9ae0 src/cpu/o3/cpu.hh 09b482ee9ae0 src/cpu/ozone/front_end.hh 09b482ee9ae0 src/cpu/ozone/front_end_impl.hh 09b482ee9ae0 src/cpu/ozone/lw_lsq.hh 09b482ee9ae0 src/cpu/ozone/lw_lsq_impl.hh 09b482ee9ae0 src/cpu/simple/atomic.cc 09b482ee9ae0 src/cpu/testers/memtest/memtest.hh 09b482ee9ae0 src/cpu/testers/memtest/memtest.cc 09b482ee9ae0 src/cpu/testers/networktest/networktest.hh 09b482ee9ae0 src/cpu/testers/networktest/networktest.cc 09b482ee9ae0 src/dev/arm/gic.hh 09b482ee9ae0 src/dev/arm/gic.cc 09b482ee9ae0 src/dev/arm/pl111.hh 09b482ee9ae0 src/dev/arm/pl111.cc 09b482ee9ae0 src/dev/copy_engine.hh 09b482ee9ae0 src/dev/io_device.hh 09b482ee9ae0 src/dev/io_device.cc 09b482ee9ae0 src/dev/pciconfigall.hh 09b482ee9ae0 src/dev/pciconfigall.cc 09b482ee9ae0 src/dev/pcidev.hh 09b482ee9ae0 src/dev/pcidev.cc 09b482ee9ae0 src/dev/sinic.cc 09b482ee9ae0 src/dev/sparc/iob.hh 09b482ee9ae0 src/dev/sparc/iob.cc 09b482ee9ae0 src/dev/uart8250.hh 09b482ee9ae0 src/dev/uart8250.cc 09b482ee9ae0 src/dev/x86/i8042.hh 09b482ee9ae0 src/dev/x86/i8042.cc 09b482ee9ae0 src/dev/x86/i82094aa.hh 09b482ee9ae0 src/dev/x86/intdev.hh 09b482ee9ae0 src/dev/x86/intdev.cc 09b482ee9ae0 src/kern/tru64/tru64_events.cc 09b482ee9ae0 src/mem/bridge.hh 09b482ee9ae0 src/mem/bridge.cc 09b482ee9ae0 src/mem/bus.hh 09b482ee9ae0 src/mem/bus.cc 09b482ee9ae0 src/mem/cache/base.hh 09b482ee9ae0 src/mem/cache/base.cc 09b482ee9ae0 src/mem/cache/cache.hh 09b482ee9ae0 src/mem/cache/cache_impl.hh 09b482ee9ae0 src/mem/physical.hh 09b482ee9ae0 src/mem/physical.cc 09b482ee9ae0 src/mem/port.hh 09b482ee9ae0 src/mem/ruby/system/RubyPort.cc 09b482ee9ae0 src/mem/tport.hh 09b482ee9ae0 src/sim/system.hh 09b482ee9ae0 Diff: http://reviews.m5sim.org/r/948/diff Testing ------- util/regress all passing (disregarding t1000 and eio) Thanks, Andreas _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
