[gem5-dev] changeset in gem5: MESI Coherence Protocol: Fix L2 miss statistics

[Nilay Vaish]

changeset e59fe7c6cd57 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=e59fe7c6cd57
description:
        MESI Coherence Protocol: Fix L2 miss statistics
        This patch removes calls to uu_ProfileMiss from transitions where the 
request
        is satisfied by the L2 cache controller.

diffstat:

 src/mem/protocol/MESI_CMP_directory-L2cache.sm |  6 ------
 1 files changed, 0 insertions(+), 6 deletions(-)

diffs (50 lines):

diff -r 172896057e59 -r e59fe7c6cd57 
src/mem/protocol/MESI_CMP_directory-L2cache.sm
--- a/src/mem/protocol/MESI_CMP_directory-L2cache.sm    Thu Jan 05 11:00:32 
2012 -0600
+++ b/src/mem/protocol/MESI_CMP_directory-L2cache.sm    Thu Jan 05 11:00:45 
2012 -0600
@@ -913,7 +913,6 @@
   transition(SS, {L1_GETS, L1_GET_INSTR}) {
     ds_sendSharedDataToRequestor;
     nn_addSharer;
-    uu_profileMiss;
     set_setMRU;
     jj_popL1RequestQueue;
   }
@@ -923,7 +922,6 @@
     d_sendDataToRequestor;
     // fw_sendFwdInvToSharers;
     fwm_sendFwdInvToSharersMinusRequestor;
-    uu_profileMiss;
     set_setMRU;
     jj_popL1RequestQueue;
   }
@@ -931,7 +929,6 @@
   transition(SS, L1_UPGRADE, SS_MB) {
     fwm_sendFwdInvToSharersMinusRequestor;
     ts_sendInvAckToUpgrader;
-    uu_profileMiss;
     set_setMRU;
     jj_popL1RequestQueue;
   }
@@ -951,7 +948,6 @@
 
   transition(M, L1_GETX, MT_MB) {
     d_sendDataToRequestor;
-    uu_profileMiss;
     set_setMRU;
     jj_popL1RequestQueue;
   }
@@ -959,14 +955,12 @@
   transition(M, L1_GET_INSTR, SS) {
     d_sendDataToRequestor;
     nn_addSharer;
-    uu_profileMiss;
     set_setMRU;
     jj_popL1RequestQueue;
   }
 
   transition(M, L1_GETS, MT_MB) {
     dd_sendExclusiveDataToRequestor;
-    uu_profileMiss;
     set_setMRU;
     jj_popL1RequestQueue;
   }
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