----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/942/#review1881 -----------------------------------------------------------
Ship it! great! - Ali On 2012-01-06 06:16:04, Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/942/ > ----------------------------------------------------------- > > (Updated 2012-01-06 06:16:04) > > > Review request for Default. > > > Summary > ------- > > MEM: Add the system port as a central access point > > The system port is used as a globally reachable access point to the > memory subsystem. The benefit of using an actual port is that the > usual infrastructure is used to resolve any access and thus makes the > overall system able to handle distributed memories in any > configuration, and also makes the accesses agnostic to the address > map. This patch only introduces the port and does not actually use it > for anything. > > > Diffs > ----- > > src/sim/System.py 58885e2e8a88 > src/sim/system.hh 58885e2e8a88 > src/sim/system.cc 58885e2e8a88 > > Diff: http://reviews.m5sim.org/r/942/diff > > > Testing > ------- > > util/regress all passing (disregarding t1000 and eio) > > > Thanks, > > Andreas > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
