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Interesting... my initial reaction was to object that it seemed like overkill 
to get rid of the default option entirely, but since it was only used it two 
places, it's hard to justify keeping it in there.

You should also delete these two lines of MetaSimObject._new_port() which are 
what make Port defaults actually work:
http://repo.gem5.org/gem5/file/f72bbe6b13fb/src/python/m5/SimObject.py#l276

- Steve


On 2011-12-23 01:38:18, Andreas Hansson wrote:
> 
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> This is an automatically generated e-mail. To reply, visit:
> http://reviews.m5sim.org/r/952/
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> 
> (Updated 2011-12-23 01:38:18)
> 
> 
> Review request for Default.
> 
> 
> Summary
> -------
> 
> MEM: Removing the default port peer from Python ports
> 
> In preparation for the introduction of Master and Slave ports, this
> patch removes the default port parameter in the Python port and thus
> forces the argument list of the Port to contain only the
> description. The drawback at this point is that the config port and
> dma port of PCI and DMA devices have to be connected explicitly. This
> is key for future diversification as the pio and config port are
> slaves, but the dma port is a master.
> 
> 
> Diffs
> -----
> 
>   configs/common/FSConfig.py ca98021c3f96 
>   src/dev/Device.py ca98021c3f96 
>   src/dev/Pci.py ca98021c3f96 
>   src/dev/arm/RealView.py ca98021c3f96 
>   src/dev/pcidev.cc ca98021c3f96 
>   src/dev/x86/SouthBridge.py ca98021c3f96 
>   src/python/m5/params.py ca98021c3f96 
> 
> Diff: http://reviews.m5sim.org/r/952/diff
> 
> 
> Testing
> -------
> 
> util/regress all passing (disregarding t1000 and eio)
> 
> 
> Thanks,
> 
> Andreas
> 
>

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