changeset cf8fb1aa1b30 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=cf8fb1aa1b30 description: Configs: Use connectAllPorts to connect ports for simple-timing-ruby.
diffstat: tests/configs/simple-timing-ruby.py | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diffs (13 lines): diff -r 0f5ced6ff69e -r cf8fb1aa1b30 tests/configs/simple-timing-ruby.py --- a/tests/configs/simple-timing-ruby.py Sat Oct 08 23:24:32 2011 -0700 +++ b/tests/configs/simple-timing-ruby.py Sat Oct 08 23:24:34 2011 -0700 @@ -82,8 +82,7 @@ # Tie the cpu cache ports to the ruby cpu ports and # physmem, respectively # -cpu.icache_port = system.ruby._cpu_ruby_ports[0].port -cpu.dcache_port = system.ruby._cpu_ruby_ports[0].port +cpu.connectAllPorts(system.ruby._cpu_ruby_ports[0]) # ----------------------- # run simulation _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
