changeset 05fb20d7064b in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=05fb20d7064b
description:
SE/FS: Get rid of FULL_SYSTEM in sim.
diffstat:
src/base/remote_gdb.cc | 1 +
src/cpu/BaseCPU.py | 8 +-
src/sim/SConscript | 2 +-
src/sim/faults.cc | 12 +-
src/sim/process.cc | 4 -
src/sim/pseudo_inst.cc | 302 +++++++++++++++++++++++++++---------------------
src/sim/pseudo_inst.hh | 67 ----------
src/sim/tlb.cc | 16 +-
8 files changed, 190 insertions(+), 222 deletions(-)
diffs (truncated from 636 to 300 lines):
diff -r 8cd08c045cab -r 05fb20d7064b src/base/remote_gdb.cc
--- a/src/base/remote_gdb.cc Wed Nov 02 01:27:45 2011 -0700
+++ b/src/base/remote_gdb.cc Wed Nov 02 02:11:14 2011 -0700
@@ -134,6 +134,7 @@
#include "mem/port.hh"
#include "mem/translating_port.hh"
#include "mem/vport.hh"
+#include "sim/full_system.hh"
#include "sim/system.hh"
using namespace std;
diff -r 8cd08c045cab -r 05fb20d7064b src/cpu/BaseCPU.py
--- a/src/cpu/BaseCPU.py Wed Nov 02 01:27:45 2011 -0700
+++ b/src/cpu/BaseCPU.py Wed Nov 02 02:11:14 2011 -0700
@@ -78,10 +78,10 @@
do_statistics_insts = Param.Bool(True,
"enable statistics pseudo instructions")
- if buildEnv['FULL_SYSTEM']:
- profile = Param.Latency('0ns', "trace the kernel stack")
- do_quiesce = Param.Bool(True, "enable quiesce instructions")
- else:
+ profile = Param.Latency('0ns', "trace the kernel stack")
+ do_quiesce = Param.Bool(True, "enable quiesce instructions")
+
+ if not buildEnv['FULL_SYSTEM']:
workload = VectorParam.Process("processes to run")
if buildEnv['TARGET_ISA'] == 'sparc':
diff -r 8cd08c045cab -r 05fb20d7064b src/sim/SConscript
--- a/src/sim/SConscript Wed Nov 02 01:27:45 2011 -0700
+++ b/src/sim/SConscript Wed Nov 02 02:11:14 2011 -0700
@@ -57,7 +57,7 @@
Source('pseudo_inst.cc')
Source('system.cc')
-if not env['FULL_SYSTEM'] and env['TARGET_ISA'] != 'no':
+if env['TARGET_ISA'] != 'no':
Source('tlb.cc')
DebugFlag('Checkpoint')
diff -r 8cd08c045cab -r 05fb20d7064b src/sim/faults.cc
--- a/src/sim/faults.cc Wed Nov 02 01:27:45 2011 -0700
+++ b/src/sim/faults.cc Wed Nov 02 02:11:14 2011 -0700
@@ -36,11 +36,12 @@
#include "debug/Fault.hh"
#include "mem/page_table.hh"
#include "sim/faults.hh"
+#include "sim/full_system.hh"
#include "sim/process.hh"
void FaultBase::invoke(ThreadContext * tc, StaticInstPtr inst)
{
- if (FULL_SYSTEM) {
+ if (FullSystem) {
DPRINTF(Fault, "Fault %s at PC: %s\n", name(), tc->pcState());
assert(!tc->misspeculating());
} else {
@@ -61,11 +62,10 @@
void GenericPageTableFault::invoke(ThreadContext *tc, StaticInstPtr inst)
{
bool handled = false;
-#if !FULL_SYSTEM
- Process *p = tc->getProcessPtr();
-
- handled = p->fixupStackFault(vaddr);
-#endif
+ if (!FullSystem) {
+ Process *p = tc->getProcessPtr();
+ handled = p->fixupStackFault(vaddr);
+ }
if (!handled)
panic("Page table fault when accessing virtual address %#x\n", vaddr);
diff -r 8cd08c045cab -r 05fb20d7064b src/sim/process.cc
--- a/src/sim/process.cc Wed Nov 02 01:27:45 2011 -0700
+++ b/src/sim/process.cc Wed Nov 02 02:11:14 2011 -0700
@@ -570,7 +570,6 @@
void
LiveProcess::syscall(int64_t callnum, ThreadContext *tc)
{
-#if !FULL_SYSTEM
num_syscalls++;
SyscallDesc *desc = getDesc(callnum);
@@ -578,7 +577,6 @@
fatal("Syscall %d out of range", callnum);
desc->doSyscall(callnum, this, tc);
-#endif
}
IntReg
@@ -604,7 +602,6 @@
"executables are supported!\n Please recompile your "
"executable as a static binary and try again.\n");
-#if !FULL_SYSTEM
#if THE_ISA == ALPHA_ISA
if (objFile->getArch() != ObjectFile::Alpha)
fatal("Object file architecture does not match compiled ISA (Alpha).");
@@ -715,7 +712,6 @@
#else
#error "THE_ISA not set"
#endif
-#endif
if (process == NULL)
fatal("Unknown error creating process object.");
diff -r 8cd08c045cab -r 05fb20d7064b src/sim/pseudo_inst.cc
--- a/src/sim/pseudo_inst.cc Wed Nov 02 01:27:45 2011 -0700
+++ b/src/sim/pseudo_inst.cc Wed Nov 02 02:11:14 2011 -0700
@@ -60,6 +60,7 @@
#include "debug/Quiesce.hh"
#include "debug/WorkItems.hh"
#include "params/BaseCPU.hh"
+#include "sim/full_system.hh"
#include "sim/pseudo_inst.hh"
#include "sim/serialize.hh"
#include "sim/sim_events.hh"
@@ -76,103 +77,130 @@
namespace PseudoInst {
-#if FULL_SYSTEM
+static inline void
+panicFsOnlyPseudoInst(const char *name)
+{
+ panic("Pseudo inst \"%s\" is only available in Full System mode.");
+}
void
arm(ThreadContext *tc)
{
- if (tc->getKernelStats())
- tc->getKernelStats()->arm();
+ if (FullSystem) {
+ if (tc->getKernelStats())
+ tc->getKernelStats()->arm();
+ } else {
+ panicFsOnlyPseudoInst("arm");
+ }
}
void
quiesce(ThreadContext *tc)
{
- if (!tc->getCpuPtr()->params()->do_quiesce)
- return;
+ if (FullSystem) {
+ if (!tc->getCpuPtr()->params()->do_quiesce)
+ return;
- DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name());
+ DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name());
- tc->suspend();
- if (tc->getKernelStats())
- tc->getKernelStats()->quiesce();
+ tc->suspend();
+ if (tc->getKernelStats())
+ tc->getKernelStats()->quiesce();
+ } else {
+ panicFsOnlyPseudoInst("quiesce");
+ }
}
void
quiesceSkip(ThreadContext *tc)
{
- BaseCPU *cpu = tc->getCpuPtr();
+ if (FullSystem) {
+ BaseCPU *cpu = tc->getCpuPtr();
- if (!cpu->params()->do_quiesce)
- return;
+ if (!cpu->params()->do_quiesce)
+ return;
- EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
+ EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
- Tick resume = curTick() + 1;
+ Tick resume = curTick() + 1;
- cpu->reschedule(quiesceEvent, resume, true);
+ cpu->reschedule(quiesceEvent, resume, true);
- DPRINTF(Quiesce, "%s: quiesceSkip() until %d\n",
- cpu->name(), resume);
+ DPRINTF(Quiesce, "%s: quiesceSkip() until %d\n",
+ cpu->name(), resume);
- tc->suspend();
- if (tc->getKernelStats())
- tc->getKernelStats()->quiesce();
+ tc->suspend();
+ if (tc->getKernelStats())
+ tc->getKernelStats()->quiesce();
+ } else {
+ panicFsOnlyPseudoInst("quiesceSkip");
+ }
}
void
quiesceNs(ThreadContext *tc, uint64_t ns)
{
- BaseCPU *cpu = tc->getCpuPtr();
+ if (FullSystem) {
+ BaseCPU *cpu = tc->getCpuPtr();
- if (!cpu->params()->do_quiesce || ns == 0)
- return;
+ if (!cpu->params()->do_quiesce || ns == 0)
+ return;
- EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
+ EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
- Tick resume = curTick() + SimClock::Int::ns * ns;
+ Tick resume = curTick() + SimClock::Int::ns * ns;
- cpu->reschedule(quiesceEvent, resume, true);
+ cpu->reschedule(quiesceEvent, resume, true);
- DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n",
- cpu->name(), ns, resume);
+ DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n",
+ cpu->name(), ns, resume);
- tc->suspend();
- if (tc->getKernelStats())
- tc->getKernelStats()->quiesce();
+ tc->suspend();
+ if (tc->getKernelStats())
+ tc->getKernelStats()->quiesce();
+ } else {
+ panicFsOnlyPseudoInst("quiesceNs");
+ }
}
void
quiesceCycles(ThreadContext *tc, uint64_t cycles)
{
- BaseCPU *cpu = tc->getCpuPtr();
+ if (FullSystem) {
+ BaseCPU *cpu = tc->getCpuPtr();
- if (!cpu->params()->do_quiesce || cycles == 0)
- return;
+ if (!cpu->params()->do_quiesce || cycles == 0)
+ return;
- EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
+ EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
- Tick resume = curTick() + cpu->ticks(cycles);
+ Tick resume = curTick() + cpu->ticks(cycles);
- cpu->reschedule(quiesceEvent, resume, true);
+ cpu->reschedule(quiesceEvent, resume, true);
- DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n",
- cpu->name(), cycles, resume);
+ DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n",
+ cpu->name(), cycles, resume);
- tc->suspend();
- if (tc->getKernelStats())
- tc->getKernelStats()->quiesce();
+ tc->suspend();
+ if (tc->getKernelStats())
+ tc->getKernelStats()->quiesce();
+ } else {
+ panicFsOnlyPseudoInst("quiesceCycles");
+ }
}
uint64_t
quiesceTime(ThreadContext *tc)
{
- return (tc->readLastActivate() - tc->readLastSuspend()) /
- SimClock::Int::ns;
+ if (FullSystem) {
+ return (tc->readLastActivate() - tc->readLastSuspend()) /
+ SimClock::Int::ns;
+ } else {
+ panicFsOnlyPseudoInst("quiesceTime");
+ return 0;
+ }
}
-#endif
-
uint64_t
rpns(ThreadContext *tc)
{
@@ -195,77 +223,86 @@
exitSimLoop("m5_exit instruction encountered", 0, when);
}
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