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(Updated Feb. 27, 2012, 3:54 p.m.) Review request for Default. Description ------- CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable Enables the CheckerCPU to be enabled at runtime with the --checker option from the configs/example/fs.py and configs/example/se.py configuration files. Also merges with the SE/FS changes. Diffs (updated) ----- SConstruct c68ae0f78d8e configs/common/Options.py c68ae0f78d8e configs/common/Simulation.py c68ae0f78d8e configs/example/fs.py c68ae0f78d8e configs/example/se.py c68ae0f78d8e src/arch/SConscript c68ae0f78d8e src/arch/arm/isa.cc c68ae0f78d8e src/arch/arm/utility.cc c68ae0f78d8e src/cpu/BaseCPU.py c68ae0f78d8e src/cpu/SConscript c68ae0f78d8e src/cpu/base.cc c68ae0f78d8e src/cpu/base_dyn_inst.hh c68ae0f78d8e src/cpu/base_dyn_inst_impl.hh c68ae0f78d8e src/cpu/checker/cpu.hh c68ae0f78d8e src/cpu/checker/cpu.cc c68ae0f78d8e src/cpu/checker/cpu_impl.hh c68ae0f78d8e src/cpu/checker/thread_context.hh c68ae0f78d8e src/cpu/o3/O3CPU.py c68ae0f78d8e src/cpu/o3/SConscript c68ae0f78d8e src/cpu/o3/commit_impl.hh c68ae0f78d8e src/cpu/o3/cpu.hh c68ae0f78d8e src/cpu/o3/cpu.cc c68ae0f78d8e src/cpu/o3/cpu_builder.cc c68ae0f78d8e src/cpu/o3/dyn_inst_impl.hh c68ae0f78d8e src/cpu/o3/fetch_impl.hh c68ae0f78d8e src/cpu/o3/iew_impl.hh c68ae0f78d8e src/cpu/o3/lsq_unit_impl.hh c68ae0f78d8e src/cpu/o3/thread_context.hh c68ae0f78d8e src/cpu/o3/thread_context_impl.hh c68ae0f78d8e src/cpu/ozone/OzoneCPU.py c68ae0f78d8e src/cpu/ozone/SConscript c68ae0f78d8e src/cpu/ozone/cpu_impl.hh c68ae0f78d8e src/cpu/ozone/front_end_impl.hh c68ae0f78d8e src/cpu/ozone/lw_back_end_impl.hh c68ae0f78d8e src/cpu/ozone/lw_lsq_impl.hh c68ae0f78d8e src/cpu/simple/BaseSimpleCPU.py c68ae0f78d8e src/cpu/simple/base.hh c68ae0f78d8e src/cpu/simple/base.cc c68ae0f78d8e src/cpu/simple_thread.hh c68ae0f78d8e src/cpu/thread_context.hh c68ae0f78d8e Diff: http://reviews.gem5.org/r/1031/diff/diff Testing ------- Compiles with ARM ISA. Boots linux with O3 model attached to Checker in FS mode. Runs simple HelloWorld in SE mode. Thanks, Geoffrey Blake _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
