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src/cpu/o3/iew_impl.hh <http://reviews.gem5.org/r/1032/#comment2691> I'm a little confused... how does TARGET_ALPHA going away here correlate with compiling the checker CPU? - Steve Reinhardt On Feb. 27, 2012, 3:53 p.m., Geoffrey Blake wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1032/ > ----------------------------------------------------------- > > (Updated Feb. 27, 2012, 3:53 p.m.) > > > Review request for Default. > > > Description > ------- > > CheckerCPU: Add function stubs to non-ARM ISA source to compile with > CheckerCPU > > Making the CheckerCPU a runtime time option requires the code to be compatible > with ISAs other than ARM. This patch adds the appropriate function > stubs to allow compilation. > > > Diffs > ----- > > src/arch/alpha/tlb.hh c68ae0f78d8e > src/arch/alpha/tlb.cc c68ae0f78d8e > src/arch/mips/tlb.hh c68ae0f78d8e > src/arch/mips/tlb.cc c68ae0f78d8e > src/arch/power/tlb.hh c68ae0f78d8e > src/arch/power/tlb.cc c68ae0f78d8e > src/arch/sparc/tlb.hh c68ae0f78d8e > src/arch/sparc/tlb.cc c68ae0f78d8e > src/arch/x86/tlb.hh c68ae0f78d8e > src/arch/x86/tlb.cc c68ae0f78d8e > src/cpu/checker/cpu.hh c68ae0f78d8e > src/cpu/checker/cpu_impl.hh c68ae0f78d8e > src/cpu/inorder/thread_context.hh c68ae0f78d8e > src/cpu/o3/commit_impl.hh c68ae0f78d8e > src/cpu/o3/iew_impl.hh c68ae0f78d8e > src/cpu/ozone/back_end_impl.hh c68ae0f78d8e > src/cpu/ozone/lw_back_end_impl.hh c68ae0f78d8e > > Diff: http://reviews.gem5.org/r/1032/diff/ > > > Testing > ------- > > Compiles for all ISAs. > > > Thanks, > > Geoffrey Blake > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
