changeset fe907afe14a3 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=fe907afe14a3
description:
x86: Fix x86 TLB and Walker
This patch adds a function to X86 tlb that returns the
walker port. This port is required for correctly connecting
the walker ports for the cpu just switched in
diffstat:
src/arch/x86/pagetable_walker.hh | 2 +-
src/arch/x86/tlb.cc | 6 ++++++
src/arch/x86/tlb.hh | 2 ++
3 files changed, 9 insertions(+), 1 deletions(-)
diffs (47 lines):
diff -r 50ce4deacda9 -r fe907afe14a3 src/arch/x86/pagetable_walker.hh
--- a/src/arch/x86/pagetable_walker.hh Thu Mar 01 11:37:02 2012 -0600
+++ b/src/arch/x86/pagetable_walker.hh Thu Mar 01 11:37:03 2012 -0600
@@ -80,7 +80,6 @@
friend class WalkerPort;
WalkerPort port;
- Port *getPort(const std::string &if_name, int idx = -1);
// State to track each walk of the page table
class WalkerState : public FastAlloc
@@ -167,6 +166,7 @@
RequestPtr req, BaseTLB::Mode mode);
Fault startFunctional(ThreadContext * _tc, Addr &addr,
Addr &pageSize, BaseTLB::Mode mode);
+ Port *getPort(const std::string &if_name, int idx = -1);
protected:
// The TLB we're supposed to load.
diff -r 50ce4deacda9 -r fe907afe14a3 src/arch/x86/tlb.cc
--- a/src/arch/x86/tlb.cc Thu Mar 01 11:37:02 2012 -0600
+++ b/src/arch/x86/tlb.cc Thu Mar 01 11:37:03 2012 -0600
@@ -421,6 +421,12 @@
{
}
+Port *
+TLB::getPort()
+{
+ return walker->getPort("port");
+}
+
} // namespace X86ISA
X86ISA::TLB *
diff -r 50ce4deacda9 -r fe907afe14a3 src/arch/x86/tlb.hh
--- a/src/arch/x86/tlb.hh Thu Mar 01 11:37:02 2012 -0600
+++ b/src/arch/x86/tlb.hh Thu Mar 01 11:37:03 2012 -0600
@@ -120,6 +120,8 @@
// Checkpointing
virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string §ion);
+
+ virtual Port * getPort();
};
}
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