changeset bba76d164f9e in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=bba76d164f9e
description:
clang: Fix recently introduced clang compilation errors
This patch makes the code compile with clang 2.9 and 3.0 again by
making two very minor changes. Firt, it maintains a strict typing in
the forward declaration of the BaseCPUParams. Second, it adds a
FullSystemInt flag of the type unsigned int next to the boolean
FullSystem flag. The FullSystemInt variable can be used in
decode-statements (expands to switch statements) in the instruction
decoder.
diffstat:
src/arch/alpha/isa/decoder.isa | 6 +++---
src/arch/mips/isa/decoder.isa | 4 ++--
src/arch/x86/isa/decoder/one_byte_opcodes.isa | 2 +-
src/arch/x86/isa/decoder/two_byte_opcodes.isa | 4 ++--
src/cpu/base.hh | 2 +-
src/sim/full_system.hh | 12 ++++++++++++
src/sim/root.cc | 2 ++
7 files changed, 23 insertions(+), 9 deletions(-)
diffs (136 lines):
diff -r 7d74a97c525f -r bba76d164f9e src/arch/alpha/isa/decoder.isa
--- a/src/arch/alpha/isa/decoder.isa Mon Mar 19 06:34:02 2012 -0400
+++ b/src/arch/alpha/isa/decoder.isa Mon Mar 19 06:35:04 2012 -0400
@@ -805,14 +805,14 @@
0x4400: wmb({{ }}, IsWriteBarrier, MemWriteOp);
}
- 0xe000: decode FullSystem {
+ 0xe000: decode FullSystemInt {
0: FailUnimpl::rc_se();
default: BasicOperate::rc({{
Ra = IntrFlag;
IntrFlag = 0;
}}, IsNonSpeculative, IsUnverifiable);
}
- 0xf000: decode FullSystem {
+ 0xf000: decode FullSystemInt {
0: FailUnimpl::rs_se();
default: BasicOperate::rs({{
Ra = IntrFlag;
@@ -821,7 +821,7 @@
}
}
- 0x00: decode FullSystem {
+ 0x00: decode FullSystemInt {
0: decode PALFUNC {
format EmulatedCallPal {
0x00: halt ({{
diff -r 7d74a97c525f -r bba76d164f9e src/arch/mips/isa/decoder.isa
--- a/src/arch/mips/isa/decoder.isa Mon Mar 19 06:34:02 2012 -0400
+++ b/src/arch/mips/isa/decoder.isa Mon Mar 19 06:35:04 2012 -0400
@@ -163,7 +163,7 @@
format BasicOp {
0x2: movz({{ Rd = (Rt == 0) ? Rs : Rd; }});
0x3: movn({{ Rd = (Rt != 0) ? Rs : Rd; }});
- 0x4: decode FullSystem {
+ 0x4: decode FullSystemInt {
0: syscall_se({{ xc->syscall(R2); }},
IsSerializeAfter, IsNonSpeculative);
default: syscall({{ fault = new SystemCallFault(); }});
@@ -2431,7 +2431,7 @@
}
}
0x3: decode OP default FailUnimpl::rdhwr() {
- 0x0: decode FullSystem {
+ 0x0: decode FullSystemInt {
0: decode RD {
29: BasicOp::rdhwr_se({{ Rt = TpValue; }});
}
diff -r 7d74a97c525f -r bba76d164f9e
src/arch/x86/isa/decoder/one_byte_opcodes.isa
--- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa Mon Mar 19 06:34:02
2012 -0400
+++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa Mon Mar 19 06:35:04
2012 -0400
@@ -394,7 +394,7 @@
default: Inst::RET_FAR();
}
0x4: int3();
- 0x5: decode FullSystem default int_Ib() {
+ 0x5: decode FullSystemInt default int_Ib() {
0: decode IMMEDIATE {
// Really only the LSB matters, but the predecoder
// will sign extend it, and there's no easy way to
diff -r 7d74a97c525f -r bba76d164f9e
src/arch/x86/isa/decoder/two_byte_opcodes.isa
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa Mon Mar 19 06:34:02
2012 -0400
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa Mon Mar 19 06:35:04
2012 -0400
@@ -216,7 +216,7 @@
default: Inst::UD2();
}
}
- 0x05: decode FullSystem {
+ 0x05: decode FullSystemInt {
0: SyscallInst::syscall('xc->syscall(Rax)',
IsSyscall, IsNonSpeculative, IsSerializeAfter);
default: decode MODE_MODE {
@@ -398,7 +398,7 @@
0x1: Inst::RDTSC();
0x2: Inst::RDMSR();
0x3: rdpmc();
- 0x4: decode FullSystem {
+ 0x4: decode FullSystemInt {
0: SyscallInst::sysenter('xc->syscall(Rax)',
IsSyscall, IsNonSpeculative, IsSerializeAfter);
default: sysenter();
diff -r 7d74a97c525f -r bba76d164f9e src/cpu/base.hh
--- a/src/cpu/base.hh Mon Mar 19 06:34:02 2012 -0400
+++ b/src/cpu/base.hh Mon Mar 19 06:35:04 2012 -0400
@@ -58,7 +58,7 @@
#include "sim/full_system.hh"
#include "sim/insttracer.hh"
-class BaseCPUParams;
+struct BaseCPUParams;
class BranchPred;
class CheckerCPU;
class ThreadContext;
diff -r 7d74a97c525f -r bba76d164f9e src/sim/full_system.hh
--- a/src/sim/full_system.hh Mon Mar 19 06:34:02 2012 -0400
+++ b/src/sim/full_system.hh Mon Mar 19 06:35:04 2012 -0400
@@ -31,6 +31,18 @@
#ifndef __SIM_FULL_SYSTEM_HH__
#define __SIM_FULL_SYSTEM_HH__
+/**
+ * The FullSystem variable can be used to determine the current mode
+ * of simulation.
+ */
extern bool FullSystem;
+/**
+ * In addition to the boolean flag we make use of an unsigned int
+ * since the CPU instruction decoder makes use of the variable in
+ * switch statements. A value of 0 signifies syscall emulation, and
+ * any other value full system.
+ */
+extern unsigned int FullSystemInt;
+
#endif // __SIM_FULL_SYSTEM_HH__
diff -r 7d74a97c525f -r bba76d164f9e src/sim/root.cc
--- a/src/sim/root.cc Mon Mar 19 06:34:02 2012 -0400
+++ b/src/sim/root.cc Mon Mar 19 06:35:04 2012 -0400
@@ -125,6 +125,7 @@
}
bool FullSystem;
+unsigned int FullSystemInt;
Root *
RootParams::create()
@@ -136,6 +137,7 @@
created = true;
FullSystem = full_system;
+ FullSystemInt = full_system ? 1 : 0;
return new Root(this);
}
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