changeset 4da2ea94319f in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=4da2ea94319f description: ARM: Update stats for IT and conditional branch changes
diffstat: tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini | 15 +- tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simerr | 11 +- tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simout | 13 +- tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/stats.txt | 1454 ++-- tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini | 15 +- tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simout | 13 +- tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt | 2654 +++++----- tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini | 21 +- tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout | 13 +- tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt | 1424 ++-- tests/long/se/00.gzip/ref/arm/linux/o3-timing/config.ini | 2 +- tests/long/se/00.gzip/ref/arm/linux/o3-timing/simout | 8 +- tests/long/se/00.gzip/ref/arm/linux/o3-timing/stats.txt | 1000 +- tests/long/se/00.gzip/ref/arm/linux/simple-atomic/config.ini | 2 +- tests/long/se/00.gzip/ref/arm/linux/simple-atomic/simout | 6 +- tests/long/se/00.gzip/ref/arm/linux/simple-atomic/stats.txt | 12 +- tests/long/se/00.gzip/ref/arm/linux/simple-timing/config.ini | 2 +- tests/long/se/00.gzip/ref/arm/linux/simple-timing/simout | 6 +- tests/long/se/00.gzip/ref/arm/linux/simple-timing/stats.txt | 12 +- tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini | 4 +- tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout | 8 +- tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt | 1054 +- tests/long/se/10.mcf/ref/arm/linux/simple-atomic/config.ini | 4 +- tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simout | 6 +- tests/long/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt | 12 +- tests/long/se/10.mcf/ref/arm/linux/simple-timing/config.ini | 4 +- tests/long/se/10.mcf/ref/arm/linux/simple-timing/simout | 6 +- tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt | 12 +- tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini | 4 +- tests/long/se/20.parser/ref/arm/linux/o3-timing/simout | 8 +- tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt | 1036 +- tests/long/se/20.parser/ref/arm/linux/simple-atomic/config.ini | 4 +- tests/long/se/20.parser/ref/arm/linux/simple-atomic/simout | 6 +- tests/long/se/20.parser/ref/arm/linux/simple-atomic/stats.txt | 12 +- tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini | 4 +- tests/long/se/20.parser/ref/arm/linux/simple-timing/simout | 6 +- tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt | 12 +- tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini | 2 +- tests/long/se/30.eon/ref/arm/linux/o3-timing/simout | 10 +- tests/long/se/30.eon/ref/arm/linux/o3-timing/stats.txt | 1055 +- tests/long/se/30.eon/ref/arm/linux/simple-atomic/config.ini | 2 +- tests/long/se/30.eon/ref/arm/linux/simple-atomic/simout | 6 +- tests/long/se/30.eon/ref/arm/linux/simple-atomic/stats.txt | 12 +- tests/long/se/30.eon/ref/arm/linux/simple-timing/config.ini | 2 +- tests/long/se/30.eon/ref/arm/linux/simple-timing/simout | 6 +- tests/long/se/30.eon/ref/arm/linux/simple-timing/stats.txt | 12 +- tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini | 2 +- tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/simout | 8 +- tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/stats.txt | 1084 ++-- tests/long/se/40.perlbmk/ref/arm/linux/simple-atomic/config.ini | 2 +- tests/long/se/40.perlbmk/ref/arm/linux/simple-atomic/simout | 6 +- tests/long/se/40.perlbmk/ref/arm/linux/simple-atomic/stats.txt | 12 +- tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/config.ini | 2 +- tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/simout | 6 +- tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/stats.txt | 12 +- tests/long/se/50.vortex/ref/arm/linux/o3-timing/config.ini | 2 +- tests/long/se/50.vortex/ref/arm/linux/o3-timing/simout | 8 +- tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt | 1108 ++-- tests/long/se/50.vortex/ref/arm/linux/simple-atomic/config.ini | 2 +- tests/long/se/50.vortex/ref/arm/linux/simple-atomic/simout | 6 +- tests/long/se/50.vortex/ref/arm/linux/simple-atomic/stats.txt | 12 +- tests/long/se/50.vortex/ref/arm/linux/simple-timing/config.ini | 2 +- tests/long/se/50.vortex/ref/arm/linux/simple-timing/simout | 6 +- tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt | 12 +- tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini | 2 +- tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout | 8 +- tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt | 960 +- tests/long/se/60.bzip2/ref/arm/linux/simple-atomic/config.ini | 2 +- tests/long/se/60.bzip2/ref/arm/linux/simple-atomic/simout | 6 +- tests/long/se/60.bzip2/ref/arm/linux/simple-atomic/stats.txt | 12 +- tests/long/se/60.bzip2/ref/arm/linux/simple-timing/config.ini | 2 +- tests/long/se/60.bzip2/ref/arm/linux/simple-timing/simout | 6 +- tests/long/se/60.bzip2/ref/arm/linux/simple-timing/stats.txt | 12 +- tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini | 2 +- tests/long/se/70.twolf/ref/arm/linux/o3-timing/simout | 10 +- tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt | 1032 +- tests/long/se/70.twolf/ref/arm/linux/simple-atomic/config.ini | 2 +- tests/long/se/70.twolf/ref/arm/linux/simple-atomic/simout | 6 +- tests/long/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt | 12 +- tests/long/se/70.twolf/ref/arm/linux/simple-timing/config.ini | 2 +- tests/long/se/70.twolf/ref/arm/linux/simple-timing/simout | 6 +- tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt | 12 +- tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/config.ini | 15 +- tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/simout | 9 +- tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/stats.txt | 342 +- tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini | 15 +- tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout | 9 +- tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt | 130 +- tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/config.ini | 15 +- tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simout | 9 +- tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/stats.txt | 352 +- tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini | 15 +- tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simout | 9 +- tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt | 140 +- tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini | 2 +- tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout | 8 +- tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt | 664 +- tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini | 2 +- tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout | 8 +- tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt | 664 +- tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/config.ini | 2 +- tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/simout | 6 +- tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/stats.txt | 12 +- tests/quick/se/00.hello/ref/arm/linux/simple-atomic/config.ini | 2 +- tests/quick/se/00.hello/ref/arm/linux/simple-atomic/simout | 6 +- tests/quick/se/00.hello/ref/arm/linux/simple-atomic/stats.txt | 12 +- tests/quick/se/00.hello/ref/arm/linux/simple-timing/config.ini | 2 +- tests/quick/se/00.hello/ref/arm/linux/simple-timing/simout | 6 +- tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt | 12 +- 109 files changed, 8423 insertions(+), 8423 deletions(-) diffs (truncated from 20349 to 300 lines): diff -r 2c3ee562ccca -r 4da2ea94319f tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini Wed Mar 21 10:34:06 2012 -0500 +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini Wed Mar 21 10:36:45 2012 -0500 @@ -579,7 +579,7 @@ header_cycles=1 use_default_range=false width=64 -master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc_fake.pio system.realview.flash_fake.pio system.iocache.cpu_side +master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma [system.iocache] @@ -673,7 +673,7 @@ [system.realview] type=RealView -children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc_fake sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake +children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake intrctrl=system.intrctrl max_mem_size=268435456 mem_start_addr=0 @@ -913,13 +913,16 @@ system=system pio=system.iobus.master[1] -[system.realview.rtc_fake] -type=AmbaFake -amba_id=266289 -ignore_access=false +[system.realview.rtc] +type=PL031 +amba_id=3412017 +gic=system.realview.gic +int_delay=100000 +int_num=42 pio_addr=268529664 pio_latency=1000 system=system +time=Thu Jan 1 00:00:00 2009 pio=system.iobus.master[23] [system.realview.sci_fake] diff -r 2c3ee562ccca -r 4da2ea94319f tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simerr --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simerr Wed Mar 21 10:34:06 2012 -0500 +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simerr Wed Mar 21 10:36:45 2012 -0500 @@ -10,13 +10,12 @@ warn: instruction 'mcr dccimvac' unimplemented warn: instruction 'mcr dccmvau' unimplemented warn: instruction 'mcr icimvau' unimplemented -warn: 5655885500: Instruction results do not match! (Values may not actually be integers) Inst: 0x3704, checker: 0x3708 -warn: 5665876500: Instruction results do not match! (Values may not actually be integers) Inst: 0x36c4, checker: 0x36c8 -warn: 5705833500: Instruction results do not match! (Values may not actually be integers) Inst: 0x3604, checker: 0x3608 -warn: 5722480500: Instruction results do not match! (Values may not actually be integers) Inst: 0x35c4, checker: 0x35c8 -warn: 6171915000: Instruction results do not match! (Values may not actually be integers) Inst: 0x34f0, checker: 0x34f8 +warn: 5654850500: Instruction results do not match! (Values may not actually be integers) Inst: 0x3704, checker: 0x3708 +warn: 5664849500: Instruction results do not match! (Values may not actually be integers) Inst: 0x36c4, checker: 0x36c8 +warn: 5704830500: Instruction results do not match! (Values may not actually be integers) Inst: 0x3604, checker: 0x3608 +warn: 5721485500: Instruction results do not match! (Values may not actually be integers) Inst: 0x35c4, checker: 0x35c8 warn: LCD dual screen mode not supported -warn: 53400472000: Instruction results do not match! (Values may not actually be integers) Inst: 0x19dc, checker: 0x1a04 +warn: 53386624000: Instruction results do not match! (Values may not actually be integers) Inst: 0x19dc, checker: 0x1a04 warn: Returning thumbEE disabled for now since we don't support CP14config registers and jumping to ThumbEE vectors warn: Returning thumbEE disabled for now since we don't support CP14config registers and jumping to ThumbEE vectors warn: Returning thumbEE disabled for now since we don't support CP14config registers and jumping to ThumbEE vectors diff -r 2c3ee562ccca -r 4da2ea94319f tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simout --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simout Wed Mar 21 10:34:06 2012 -0500 +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simout Wed Mar 21 10:36:45 2012 -0500 @@ -1,15 +1,12 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Mar 9 2012 10:15:20 -gem5 started Mar 9 2012 10:47:04 -gem5 executing on zizzer +gem5 compiled Mar 17 2012 11:46:05 +gem5 started Mar 17 2012 18:15:21 +gem5 executing on u200540-lin command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/fs/10.linux-boot/arm/linux/realview-o3-checker -re tests/run.py build/ARM/tests/fast/long/fs/10.linux-boot/arm/linux/realview-o3-checker -The currently selected ARM platforms doesn't support - the amount of DRAM you've selected. Please try - another platform Global frequency set at 1000000000000 ticks per second -info: kernel located at: /dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 +info: kernel located at: /projects/pd/randd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 info: Using bootloader at address 0x80000000 info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 2503099557500 because m5_exit instruction encountered +Exiting @ tick 2501676293500 because m5_exit instruction encountered diff -r 2c3ee562ccca -r 4da2ea94319f tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/stats.txt --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/stats.txt Wed Mar 21 10:34:06 2012 -0500 +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/stats.txt Wed Mar 21 10:36:45 2012 -0500 @@ -1,16 +1,16 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 2.503100 # Number of seconds simulated -sim_ticks 2503099557500 # Number of ticks simulated -final_tick 2503099557500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_seconds 2.501676 # Number of seconds simulated +sim_ticks 2501676293500 # Number of ticks simulated +final_tick 2501676293500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 68083 # Simulator instruction rate (inst/s) -host_op_rate 87941 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2866621111 # Simulator tick rate (ticks/s) -host_mem_usage 384248 # Number of bytes of host memory used -host_seconds 873.19 # Real time elapsed on the host -sim_insts 59449445 # Number of instructions simulated -sim_ops 76789092 # Number of ops (including micro ops) simulated +host_inst_rate 79857 # Simulator instruction rate (inst/s) +host_op_rate 103150 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 3360326389 # Simulator tick rate (ticks/s) +host_mem_usage 381664 # Number of bytes of host memory used +host_seconds 744.47 # Real time elapsed on the host +sim_insts 59451291 # Number of instructions simulated +sim_ops 76792341 # Number of ops (including micro ops) simulated system.realview.nvmem.bytes_read 64 # Number of bytes read from this memory system.realview.nvmem.bytes_inst_read 64 # Number of instructions bytes read from this memory system.realview.nvmem.bytes_written 0 # Number of bytes written to this memory @@ -20,148 +20,151 @@ system.realview.nvmem.bw_read 26 # Total read bandwidth from this memory (bytes/s) system.realview.nvmem.bw_inst_read 26 # Instruction read bandwidth from this memory (bytes/s) system.realview.nvmem.bw_total 26 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bytes_read 130740776 # Number of bytes read from this memory -system.physmem.bytes_inst_read 1120320 # Number of instructions bytes read from this memory -system.physmem.bytes_written 9586312 # Number of bytes written to this memory -system.physmem.num_reads 15115704 # Number of read requests responded to by this memory -system.physmem.num_writes 856678 # Number of write requests responded to by this memory +system.physmem.bytes_read 129652968 # Number of bytes read from this memory +system.physmem.bytes_inst_read 1121024 # Number of instructions bytes read from this memory +system.physmem.bytes_written 9585096 # Number of bytes written to this memory +system.physmem.num_reads 14979455 # Number of read requests responded to by this memory +system.physmem.num_writes 856659 # Number of write requests responded to by this memory system.physmem.num_other 0 # Number of other requests responded to by this memory -system.physmem.bw_read 52231553 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read 447573 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_write 3829777 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_total 56061329 # Total bandwidth to/from this memory (bytes/s) -system.l2c.replacements 119794 # number of replacements -system.l2c.tagsinuse 26073.611012 # Cycle average of tags in use -system.l2c.total_refs 1840774 # Total number of references to valid blocks. -system.l2c.sampled_refs 150725 # Sample count of references to valid blocks. -system.l2c.avg_refs 12.212798 # Average number of references to valid blocks. +system.physmem.bw_read 51826437 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read 448109 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_write 3831469 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_total 55657906 # Total bandwidth to/from this memory (bytes/s) +system.l2c.replacements 119784 # number of replacements +system.l2c.tagsinuse 25999.615357 # Cycle average of tags in use +system.l2c.total_refs 1826145 # Total number of references to valid blocks. +system.l2c.sampled_refs 150763 # Sample count of references to valid blocks. +system.l2c.avg_refs 12.112687 # Average number of references to valid blocks. system.l2c.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.l2c.occ_blocks::writebacks 14308.761179 # Average occupied blocks per requestor -system.l2c.occ_blocks::cpu.dtb.walker 64.610993 # Average occupied blocks per requestor -system.l2c.occ_blocks::cpu.itb.walker 0.928498 # Average occupied blocks per requestor -system.l2c.occ_blocks::cpu.inst 6189.887268 # Average occupied blocks per requestor -system.l2c.occ_blocks::cpu.data 5509.423074 # Average occupied blocks per requestor -system.l2c.occ_percent::writebacks 0.218334 # Average percentage of cache occupancy -system.l2c.occ_percent::cpu.dtb.walker 0.000986 # Average percentage of cache occupancy +system.l2c.occ_blocks::writebacks 14272.421964 # Average occupied blocks per requestor +system.l2c.occ_blocks::cpu.dtb.walker 65.344146 # Average occupied blocks per requestor +system.l2c.occ_blocks::cpu.itb.walker 0.932012 # Average occupied blocks per requestor +system.l2c.occ_blocks::cpu.inst 6169.201034 # Average occupied blocks per requestor +system.l2c.occ_blocks::cpu.data 5491.716201 # Average occupied blocks per requestor +system.l2c.occ_percent::writebacks 0.217780 # Average percentage of cache occupancy +system.l2c.occ_percent::cpu.dtb.walker 0.000997 # Average percentage of cache occupancy system.l2c.occ_percent::cpu.itb.walker 0.000014 # Average percentage of cache occupancy -system.l2c.occ_percent::cpu.inst 0.094450 # Average percentage of cache occupancy -system.l2c.occ_percent::cpu.data 0.084067 # Average percentage of cache occupancy -system.l2c.occ_percent::total 0.397852 # Average percentage of cache occupancy -system.l2c.ReadReq_hits::cpu.dtb.walker 152848 # number of ReadReq hits -system.l2c.ReadReq_hits::cpu.itb.walker 11656 # number of ReadReq hits -system.l2c.ReadReq_hits::cpu.inst 998872 # number of ReadReq hits -system.l2c.ReadReq_hits::cpu.data 377319 # number of ReadReq hits -system.l2c.ReadReq_hits::total 1540695 # number of ReadReq hits -system.l2c.Writeback_hits::writebacks 633173 # number of Writeback hits -system.l2c.Writeback_hits::total 633173 # number of Writeback hits -system.l2c.UpgradeReq_hits::cpu.data 44 # number of UpgradeReq hits -system.l2c.UpgradeReq_hits::total 44 # number of UpgradeReq hits -system.l2c.SCUpgradeReq_hits::cpu.data 5 # number of SCUpgradeReq hits -system.l2c.SCUpgradeReq_hits::total 5 # number of SCUpgradeReq hits -system.l2c.ReadExReq_hits::cpu.data 105891 # number of ReadExReq hits -system.l2c.ReadExReq_hits::total 105891 # number of ReadExReq hits -system.l2c.demand_hits::cpu.dtb.walker 152848 # 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miss rate for ReadReq accesses -system.l2c.ReadReq_miss_rate::cpu.data 0.048292 # miss rate for ReadReq accesses -system.l2c.UpgradeReq_miss_rate::cpu.data 0.986893 # miss rate for UpgradeReq accesses -system.l2c.SCUpgradeReq_miss_rate::cpu.data 0.285714 # miss rate for SCUpgradeReq accesses -system.l2c.ReadExReq_miss_rate::cpu.data 0.569963 # miss rate for ReadExReq accesses -system.l2c.demand_miss_rate::cpu.dtb.walker 0.000961 # miss rate for demand accesses -system.l2c.demand_miss_rate::cpu.itb.walker 0.001028 # miss rate for demand accesses -system.l2c.demand_miss_rate::cpu.inst 0.017104 # miss rate for demand accesses -system.l2c.demand_miss_rate::cpu.data 0.248159 # miss rate for demand accesses -system.l2c.overall_miss_rate::cpu.dtb.walker 0.000961 # miss rate for overall accesses -system.l2c.overall_miss_rate::cpu.itb.walker 0.001028 # miss rate for overall accesses -system.l2c.overall_miss_rate::cpu.inst 0.017104 # miss rate for overall accesses -system.l2c.overall_miss_rate::cpu.data 0.248159 # miss rate for overall accesses -system.l2c.ReadReq_avg_miss_latency::cpu.dtb.walker 52289.115646 # average ReadReq miss latency -system.l2c.ReadReq_avg_miss_latency::cpu.itb.walker 51416.666667 # average ReadReq miss latency -system.l2c.ReadReq_avg_miss_latency::cpu.inst 52353.497871 # average ReadReq miss latency -system.l2c.ReadReq_avg_miss_latency::cpu.data 52284.184686 # average ReadReq miss latency -system.l2c.UpgradeReq_avg_miss_latency::cpu.data 364.020525 # average UpgradeReq miss latency -system.l2c.ReadExReq_avg_miss_latency::cpu.data 52582.663560 # average ReadExReq miss latency -system.l2c.demand_avg_miss_latency::cpu.dtb.walker 52289.115646 # average overall miss latency -system.l2c.demand_avg_miss_latency::cpu.itb.walker 51416.666667 # average overall miss latency -system.l2c.demand_avg_miss_latency::cpu.inst 52353.497871 # average overall miss latency -system.l2c.demand_avg_miss_latency::cpu.data 52546.833070 # average overall miss latency -system.l2c.overall_avg_miss_latency::cpu.dtb.walker 52289.115646 # average overall miss latency -system.l2c.overall_avg_miss_latency::cpu.itb.walker 51416.666667 # average overall miss latency -system.l2c.overall_avg_miss_latency::cpu.inst 52353.497871 # average overall miss latency -system.l2c.overall_avg_miss_latency::cpu.data 52546.833070 # average overall miss latency +system.l2c.occ_percent::cpu.inst 0.094135 # Average percentage of cache occupancy +system.l2c.occ_percent::cpu.data 0.083797 # Average percentage of cache occupancy +system.l2c.occ_percent::total 0.396723 # Average percentage of cache occupancy +system.l2c.ReadReq_hits::cpu.dtb.walker 141919 # number of ReadReq hits +system.l2c.ReadReq_hits::cpu.itb.walker 12116 # number of ReadReq hits +system.l2c.ReadReq_hits::cpu.inst 995766 # number of ReadReq hits +system.l2c.ReadReq_hits::cpu.data 377927 # number of ReadReq hits +system.l2c.ReadReq_hits::total 1527728 # number of ReadReq hits +system.l2c.Writeback_hits::writebacks 634955 # number of Writeback hits +system.l2c.Writeback_hits::total 634955 # number of Writeback hits +system.l2c.UpgradeReq_hits::cpu.data 46 # number of UpgradeReq hits +system.l2c.UpgradeReq_hits::total 46 # number of UpgradeReq hits +system.l2c.SCUpgradeReq_hits::cpu.data 7 # number of SCUpgradeReq hits +system.l2c.SCUpgradeReq_hits::total 7 # number of SCUpgradeReq hits +system.l2c.ReadExReq_hits::cpu.data 105770 # number of ReadExReq hits _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
