On Sun, 22 Apr 2012, Steve Reinhardt wrote:
On Sun, Apr 22, 2012 at 7:20 PM, Nilay Vaish <[email protected]> wrote:The way we currently recognise the CC register needs to be read, is that it appears on the RHS of some assignment statement. It seems to me that this would remain true even after the register is split. The expression will just change to something like zaps = genZaps(zaps, <something>); The isa parser would then mark zaps as both source and destination. And the two add instructions would still not execute in parallel, as the second one would be dependent on the first for the value of the zaps register. We can either -- a. drop the default assumption that we need to make partial updates, and handle partial update as a special case. b. keep the default assumption that we need to make partial updates, and handle full update as a special case. Current patches are along the lines of the second option.I'm jumping in partially informed, but can we just have two functions, like: zaps = setZaps(<something>); and zaps = modifyZaps(zaps, <something>); and then let the isa parser do its stuff naturally? Steve
I don't think that is possible. This code will appear in the .isa file. In the .isa file, we cannot decide which version to use as the CC bits to be written vary with the context in which the microop is used. So, we need a run time condition that figures out tries to evaluate if the register needs to be read.
-- Nilay _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
